Abstract: According to one embodiment, a semiconductor device includes: a wiring layer including a first metallic film provided on an oxide film, a second metallic film provided on the first metallic film, and a polysilicon film provided on the second metallic film; and an element layer provided on the wiring layer and including semiconductor elements electrically connected to the first metallic film. Standard Gibbs energy of formation of a first metal included in the first metallic film is lower than that of a second metal included in the second metallic film.

Abstract: According to one embodiment, a semiconductor device includes: a wiring layer including a first metallic film provided on an oxide film, a second metallic film provided on the first metallic film, and a polysilicon film provided on the second metallic film; and an element layer provided on the wiring layer and including semiconductor elements electrically connected to the first metallic film. Standard Gibbs energy of formation of a first metal included in the first metallic film is lower than that of a second metal included in the second metallic film.

Abstract: A semiconductor device includes a first semiconductor substrate, a first insulating film provided at the first semiconductor substrate and including a first recess portion on a surface portion thereof, a first metal film provided at the first recess portion and having a first surface exposed from the first insulating film, a second semiconductor substrate, a second insulating film provided at the second semiconductor substrate and including a second recess portion on a surface portion thereof, a second metal film provided at the second recess portion and having a second surface exposed from the second insulating film, first anti-diffusion films, and second anti-diffusion films provided at outer circumferential portions of the first anti-diffusion films. The second surface is joined to the first surface. The first anti-diffusion films are provided at the first recess portion and the second recess portion and cover the first metal film and the second metal film.

Abstract: A semiconductor device includes a first semiconductor substrate, a first insulating film provided at the first semiconductor substrate and including a first recess portion on a surface portion thereof, a first metal film provided at the first recess portion and having a first surface exposed from the first insulating film, a second semiconductor substrate, a second insulating film provided at the second semiconductor substrate and including a second recess portion on a surface portion thereof, a second metal film provided at the second recess portion and having a second surface exposed from the second insulating film, first anti-diffusion films, and second anti-diffusion films provided at outer circumferential portions of the first anti-diffusion films. The second surface is joined to the first surface. The first anti-diffusion films are provided at the first recess portion and the second recess portion and cover the first metal film and the second metal film.

Abstract: A semiconductor device according to this embodiment includes a semiconductor layer, a plurality of diffusion layers in the semiconductor layer, a gate insulating film, a gate electrode, first contacts, and second contacts. The gate insulating film is on the semiconductor layer between the plurality of diffusion layers. The gate electrode is on the gate insulating film. The first contacts include silicide layers of the same material which are on the gate electrode and the diffusion layers respectively, and first metal layers on the silicide layers. The second contacts are on the first contacts.

Abstract: In one embodiment, a semiconductor device includes an insulator. The device further includes a plug provided in the insulator, the plug including a first barrier metal layer and a first conductive layer that is provided on the first barrier metal layer. The device further includes an interconnect provided outside the insulator, the interconnect being provided on the plug and the insulator and including the first barrier metal layer, the first conductive layer and a second conductive layer that is provided on the first conductive layer.

Abstract: A semiconductor device according to this embodiment includes a semiconductor layer, a plurality of diffusion layers in the semiconductor layer, a gate insulating film, a gate electrode, first contacts, and second contacts. The gate insulating film is on the semiconductor layer between the plurality of diffusion layers. The gate electrode is on the gate insulating film. The first contacts include silicide layers of the same material which are on the gate electrode and the diffusion layers respectively, and first metal layers on the silicide layers. The second contacts are on the first contacts.

Abstract: In one embodiment, a semiconductor device includes an insulator. The device further includes a plug provided in the insulator, the plug including a first barrier metal layer and a first conductive layer that is provided on the first barrier metal layer. The device further includes an interconnect provided outside the insulator, the interconnect being provided on the plug and the insulator and including the first barrier metal layer, the first conductive layer and a second conductive layer that is provided on the first conductive layer.

Abstract: A semiconductor device according to embodiments described below includes an element region and a peripheral region. The element region is disposed on a substrate and semiconductor elements are collocated in the element region. The peripheral region is disposed on the substrate and surrounds the element region. The element region extends in a first direction parallel to the substrate and includes a plurality of wiring layers laminated on the substrate. The peripheral region includes a peripheral layer arranged to surround the element region. The peripheral layer includes a first part extending in the first direction and a second part extending in a second direction intersecting the first direction. The cross-section structures of the first part and the second part are different from one another.

Abstract: A semiconductor device according to embodiments described below includes an element region and a peripheral region. The element region is disposed on a substrate and semiconductor elements are collocated in the element region. The peripheral region is disposed on the substrate and surrounds the element region. The element region extends in a first direction parallel to the substrate and includes a plurality of wiring layers laminated on the substrate. The peripheral region includes a peripheral layer arranged to surround the element region. The peripheral layer includes a first part extending in the first direction and a second part extending in a second direction intersecting the first direction. The cross-section structures of the first part and the second part are different from one another.

Abstract: A semiconductor device according to an embodiment includes a first wire and a second wire, a bottom nitride film, a side nitride film, and a top layer. The first and second wires are arranged on a base layer. The bottom nitride film is arranged on the base layer between the first and second wires. The side nitride film is respectively arranged on side surfaces of the first and second wires. The top layer is arranged on the first and second wires. An air gap exists between the first and second wires. The air gap is enclosed by the bottom nitride film, the side nitride film, and the top layer in a cross section orthogonal to an extending direction of the wires.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

Abstract: A method of manufacturing a semiconductor device, includes forming a structure wherein a first alignment mark is provided in a first alignment-mark arrangement area of a first layer, a second alignment mark is provided in a second alignment-mark arrangement area of a second layer, a dummy pattern is provided above the first alignment-mark arrangement area, and substantially no dummy pattern is provided above the second alignment-mark arrangement area, and aligning a third layer provided above the structure by using the second alignment mark.

Abstract: A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a first metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, oxidizing at least part of the first metal film with oxidizing species remaining in the insulating film, and forming a second metal film, which includes any of a high melting point metal and a noble metal, on the first metal film, the first metal film and the second metal film sharing different metallic material.

Abstract: A method for manufacturing a semiconductor device includes heating a substrate having an insulation film thereon to a first substrate temperature so that oxidizing species are emitted from the insulating film, the insulating film having a recessed portion formed in a surface thereof, forming a metal film on the insulating film at a second substrate temperature lower than the first substrate temperature, and oxidizing at least part of the metal film with oxidizing species remaining in the insulating film.

Abstract: A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density.

Abstract: A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density.

Abstract: A method of manufacturing a semiconductor device, includes forming a structure wherein a first alignment mark is provided in a first alignment-mark arrangement area of a first layer, a second alignment mark is provided in a second alignment-mark arrangement area of a second layer, a dummy pattern is provided above the first alignment-mark arrangement area, and substantially no dummy pattern is provided above the second alignment-mark arrangement area, and aligning a third layer provided above the structure by using the second alignment mark.