Abstract: A wiring board includes a substrate having main surfaces and an electrode containing Cu or Ag as a main component on at least one main surface of the substrate, wherein the electrode protrudes from the substrate, a surface of the electrode is covered by a first Ni film containing crystalline Ni as a main component, a surface of the first Ni film is covered by a second Ni film containing amorphous Ni as a main component, and the first Ni film covers a part of a first corner where a side surface of the electrode is in contact with the substrate.

Abstract: A module includes a substrate having main surfaces; components mounted on at least one main surface of the substrate; a sealing resin on a surface of the substrate to embed the components; and a shielding film containing Cu as a main component and covering a top surface and at least one side surface of the sealing resin, wherein a surface of the shielding film is directly covered by a first Ni layer containing Ni—B or Ni—N as a main component, and a surface of the first Ni layer is covered by a second Ni layer containing Ni—P as a main component.

Abstract: A coil electrode included in an inductor component includes a plurality of metal pins upper end surfaces of which are exposed to the upper surface of a resin layer and lower end surfaces of which are exposed to a lower surface of the resin layer, and a plurality of wiring patterns that connect the upper end surfaces or the lower end surfaces of the predetermined metal pins, wherein surface roughnesses of the upper surface and the lower surface of the resin layer are larger than surface roughnesses of the upper end surfaces and the lower end surfaces of the respective metal pins, and wiring patterns are respectively formed on the upper and lower surfaces of the resin layer by plating.

Abstract: A circuit substrate that includes a substrate having a major surface, a multilayer body on the major surface, and an insulating layer that covers the major surface. The multilayer body includes a first layer and a second layer that overlies the first layer. The first layer is made of a first metal as a main material thereof, and the second layer is made of a second metal as a main material thereof. The second metal has a higher solder wettability than the first metal. As viewed perpendicular to the major surface, the insulating layer is spaced from and surrounds the surface of the second layer so as to define a recess between the multilayer body and the insulating layer.

Abstract: A circuit substrate that includes a substrate having a major surface, a multilayer body on the major surface, and an insulating layer that covers the major surface. The multilayer body includes a first layer and a second layer that overlies the first layer. The first layer is made of a first metal as a main material thereof, and the second layer is made of a second metal as a main material thereof. The second metal has a higher solder wettability than the first metal. As viewed perpendicular to the major surface, the insulating layer is spaced from and surrounds the surface of the second layer so as to define a recess between the multilayer body and the insulating layer.

Abstract: An electronic device includes an insulating layer, a plurality of upper wiring electrode patterns formed on an upper surface of the insulating layer, and a plurality of lower wiring electrode patterns formed on a lower surface of the insulating layer. The upper wiring electrode patterns and the lower wiring electrode patterns each include an underlying electrode layer formed of a conductive paste and a plating electrode layer formed on the underlying electrode layer. With this configuration, the resistivity of the upper and lower wiring electrode patterns and can be made lower than that of the upper and lower wiring electrode patterns and each including only the underlying electrode layer formed of a conductive paste.

Abstract: A coil electrode included in an inductor component includes a plurality of metal pins upper end surfaces of which are exposed to the upper surface of a resin layer and lower end surfaces of which are exposed to a lower surface of the resin layer, and a plurality of wiring patterns that connect the upper end surfaces or the lower end surfaces of the predetermined metal pins, wherein surface roughnesses of the upper surface and the lower surface of the resin layer are larger than surface roughnesses of the upper end surfaces and the lower end surfaces of the respective metal pins, and wiring patterns are respectively formed on the upper and lower surfaces of the resin layer by plating.

Abstract: To provide a module board capable of suppressing depression of a top face of insulating resin near the center of a substrate by arranging multiple columnar connection terminals not only on a peripheral area of the substrate but also between multiple electronic components that are mounted. Multiple electronic components 4 and 4h are mounted on one face of a substrate 5 and the multiple electronic components 4 and 4h are sealed with insulating resin 3. Multiple columnar connection terminals 2 and 7 are arranged on a peripheral area of the substrate 5 and in one or more small areas 8 on the substrate 5, respectively. The one or more small areas 8 are set at positions on the substrate 5, which is not on the peripheral area of the substrate 5 and on which the multiple electronic components 4 and 4h are not mounted.

Abstract: A module includes a wiring board; a plurality of mounting electrodes for component mounting, the mounting electrodes being disposed on one principal surface of the wiring board; a plurality of components mounted on the one principal surface of the wiring board and solder-connected to the mounting electrodes; a solder resist being a photosensitive resin configured to cover the one principal surface of the wiring board, with a plating electrode layer of each mounting electrode exposed; and a sealing resin layer disposed on the one principal surface of the wiring board, the sealing resin layer being configured to cover the photosensitive resin and the components connected to the mounting electrodes. A recess substantially wedge-shaped in cross section is provided at a boundary between the plating electrode layer of each mounting electrode and the solder resist, and the recess is filled with resin of the sealing resin layer.

Abstract: An electronic device includes an insulating layer, a plurality of upper wiring electrode patterns formed on an upper surface of the insulating layer, and a plurality of lower wiring electrode patterns formed on a lower surface of the insulating layer. The upper wiring electrode patterns and the lower wiring electrode patterns each include an underlying electrode layer formed of a conductive paste and a plating electrode layer formed on the underlying electrode layer. With this configuration, the resistivity of the upper and lower wiring electrode patterns and can be made lower than that of the upper and lower wiring electrode patterns and each including only the underlying electrode layer formed of a conductive paste.

Abstract: A plating layer of a Cu-M-based alloy (M represents Ni and/or Mn) is formed on an end surface of a connection terminal member at an exposed side, the Cu-M-based alloy being capable of generating an intermetallic compound with an Sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the Cu-M-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer.

Abstract: A plating layer of a Cu—M-based alloy (M represents Ni and/or Mn) is formed on an end surface of a connection terminal member at an exposed side, the Cu—M-based alloy being capable of generating an intermetallic compound with an Sn-based low-melting-point metal contained in a bonding material forming a bonding portion and having a lattice constant different from that of the intermetallic compound by 50% or more. In the reflow process, even if the bonding material is about to flow out by re-melting thereof, since the bonding material is brought into contact with the Cu—M-based plating layer, a high-melting-point alloy of the intermetallic compound is formed so as to block the interface between the connection terminal member and the resin layer.

Abstract: A module includes a wiring board; a plurality of mounting electrodes for component mounting, the mounting electrodes being disposed on one principal surface of the wiring board; a plurality of components mounted on the one principal surface of the wiring board and solder-connected to the mounting electrodes; a solder resist being a photosensitive resin configured to cover the one principal surface of the wiring board, with a plating electrode layer of each mounting electrode exposed; and a sealing resin layer disposed on the one principal surface of the wiring board, the sealing resin layer being configured to cover the photosensitive resin and the components connected to the mounting electrodes. A recess substantially wedge-shaped in cross section is provided at a boundary between the plating electrode layer of each mounting electrode and the solder resist, and the recess is filled with resin of the sealing resin layer.

Abstract: To provide a module board capable of suppressing depression of a top face of insulating resin near the center of a substrate by arranging multiple columnar connection terminals not only on a peripheral area of the substrate but also between multiple electronic components that are mounted. Multiple electronic components 4 and 4h are mounted on one face of a substrate 5 and the multiple electronic components 4 and 4h are sealed with insulating resin 3. Multiple columnar connection terminals 2 and 7 are arranged on a peripheral area of the substrate 5 and in one or more small areas 8 on the substrate 5, respectively. The one or more small areas 8 are set at positions on the substrate 5, which is not on the peripheral area of the substrate 5 and on which the multiple electronic components 4 and 4h are not mounted.

Abstract: A laminated ceramic electronic component includes an embedded portion formed in the periphery of an external terminal electrode so as to extend and be embedded in a component main member defined by ceramic layers, whereby affects of a small edge angle are eliminated.

Abstract: A laminated ceramic electronic component includes an embedded portion formed in the periphery of an external terminal electrode so as to extend and be embedded in a component main member defined by ceramic layers, whereby affects of a small edge angle are eliminated.