Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element. Thus, a surge voltage applied across a diffused resistor can be lightened and hence an oxide film placed below the diffused resistor can be prevented from destruction.

Abstract: A reference voltage generator includes an output node, a current supply circuit including a first resistor, a second resistor, and a transistor. The current supply circuit is connected to the output node. The first resistor has a first temperature coefficient. The current supply circuit supplied a current corresponding to a value of resistance of the first resistor to the output node. The second resistor is connected to the output node. The second resistor has a second temperature coefficient that is larger than the first temperature coefficient. The transistor is connected to the second resistor. The transistor is supplied with the current from the output node through the second resistor.

Abstract: A reference voltage generator includes an output node, a current supply circuit including a first resistor, a second resistor, and a transistor. The current supply circuit is connected to the output node. The first resistor has a first temperature coefficient. The current supply circuit supplied a current corresponding to a value of resistance of the first resistor to the output node. The second resistor is connected to the output node. The second resistor has a second temperature coefficient that is larger than the first temperature coefficient. The transistor is connected to the second resistor. The transistor is supplied with the current from the output node through the second resistor.

Abstract: A semiconductor device comprises a first current mirror circuit (101) which has an input terminal (101I) and an output terminal (101O), a second current mirror circuit (102) which has an input terminal (102I) and an output terminal (102O) wherein the input terminal (102I) is coupled with the output terminal (101O) wherein the output terminal (102O) is coupled with said input terminal (101I) and a start-up circuit (103) which supplies current to input terminal (102I) based on voltage on the input terminal (101I).

Abstract: A semiconductor device has a start-up circuit which comprises a third node (N3), a first switch (103A) which electrically connects a first node (N1) and an input terminal (102I) of a second mirror circuit (102) based on a voltage level at the third node; a second switch (103B) which electrically connects the first node and the third node based on a voltage level at an input terminal (101I) of a first current mirror circuit (101); and a third switch (103C) which electrically connects the first node and the third node based on an inverted voltage level at the third node.

Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element.

Abstract: A semiconductor device comprises a first current mirror circuit (101) which has an input terminal (101I) and an output terminal (101O), a second current mirror circuit (102) which has an input terminal (102I) and an output terminal (102O) wherein the input terminal (102I) is coupled with the output terminal (101O) wherein the output terminal (102O) is coupled with said input terminal (101I) and a start-up circuit (103) which supplies current to input terminal (102I) based on voltage on the input terminal (101I).

Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element. Thus, a surge voltage applied across a diffused resistor can be lightened and hence an oxide film placed below the diffused resistor can be prevented from destruction.

Abstract: A semiconductor device has a start-up circuit which comprises a third node (N3), a first switch (103A) which electrically connects a first node (N1) and an input terminal (102I) of a second mirror circuit (102) based on a voltage level at the third node; a second switch (103B) which electrically connects the first node and the third node based on a voltage level at an input terminal (101I) of a first current mirror circuit (101); and a third switch (103C) which electrically connects the first node and the third node based on an inverted voltage level at the third node.

Abstract: A semiconductor device comprises a first current mirror circuit (101) which has an input terminal (101I) and an output terminal (101O), a second current mirror circuit (102) which has an input terminal (102I) and an output terminal (102O) wherein the input terminal (102I) is coupled with the output terminal (101O) wherein the output terminal (102O) is coupled with said input terminal (101I) and a start-up circuit (103) which supplies current to input terminal (102I) based on voltage on the input terminal (101I).

Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element. Thus, a surge voltage applied across a diffused resistor can be lightened and hence an oxide film placed below the diffused resistor can be prevented from destruction.

Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element.

Abstract: A semiconductor device according to the invention of the present application comprises a first semiconductor layer, a first insulating layer formed over the first semiconductor layer, a second semiconductor layer formed over the insulating layer, a protective element formed over the second semiconductor layer, an electrode pad, and a plurality of series-connected through holes for connecting the electrode pad and the protective element.

Abstract: The reset circuit comprises the P-channel MOS transistor 10, the resistive element 30, the N-channel MOS transistor 50, and the resistive element 40. One electrode of the P-channel MOS transistor 10 is supplyed a source voltage VDD, and other electrode and the gate electrode thereof is connected to the node 20. One node of the resistive element 30 is connected to the node 20, and other node thereof is supplyed the ground voltage VSS. One electrode of the N-channel MOS transistor 50 is connected to the output node 60, gete electrode thereof connected to the node 20, and other electrode thereof is supplyed the ground voltage VSS. One node of resistive element 40 is supplyed the source voltage VDD, and other node thereof is connected to the output node 60.

Abstract: The display device has the monitor circuit 50. The monitor circuit 50 senses the reduce of the supply voltage VDD. By sensing result, electrical charge stored capacitor 32, 34, and 36 is descharged becouse the wire 42, 44 and 46 respectively setes the ground voltage VSS. The cpacitor 32, 34 and 36 respectively coupled to wire 42, 44 and 46 for respectively transferring the display voltages.