Patents by Inventor Masafumi Nogawa

Masafumi Nogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10892716
    Abstract: An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: January 12, 2021
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shinsuke Nakano, Hiroaki Katsurai, Masafumi Nogawa, Shunji Kimura, Masatoshi Tobayashi, Shigehiro Kurita, Masahiro Endo
  • Patent number: 10804857
    Abstract: An amplifier typically exemplified by a TIA is realized that provides an optimal band characteristic, that reduces the possibility of the oscillation, and that achieves a reduced dispersion of the band characteristics. An amplifier for amplifying an electric signal, comprising: a first buffer for amplifying the electric signal; a filter that is connected to an output of the first buffer and that includes a parallel circuit consisting of an inductor and a first capacity; and a second buffer connected to an output of the filter.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: October 13, 2020
    Assignees: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT ELECTRONICS CORPORATION
    Inventors: Masafumi Nogawa, Shinsuke Nakano, Hiroaki Sanjoh, Masatoshi Tobayashi, Yoshikazu Urabe, Masahiro Endo
  • Patent number: 10666212
    Abstract: A positive-side power supply terminal (1-1a) of a differential amplifier (1-1) is connected to a positive-side power supply line (L1). A negative-side power supply terminal (1-2b) of a differential amplifier (1-2) is connected to a negative-side power supply line (L2). A negative-side power supply terminal (1-1b) of the differential amplifier (1-1) and a positive-side power supply terminal (1-2a) of the differential amplifier (1-2) are connected to each other. A final-stage amplifier (2) is connected between the positive-side power supply line (L1) and the negative-side power supply line (L2).
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: May 26, 2020
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shinsuke Nakano, Masafumi Nogawa, Hideyuki Nosaka
  • Patent number: 10637207
    Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: April 28, 2020
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshiki Kishi, Munehiko Nagatani, Shinsuke Nakano, Hiroaki Katsurai, Masafumi Nogawa, Hideyuki Nosaka
  • Publication number: 20200036344
    Abstract: An amplifier applied to TIA is provided to suppress the noise caused by a current source. An amplifier constituting a transimpedance amplifier includes an inductor element inserted between a current source connected to an input terminal of an amplification stage and a power source voltage line. The current source includes a first transistor in which a base terminal is connected to a current control bias and a collector terminal is connected to the input terminal. The inductor element is inserted between the emitter terminal of the first transistor and the power source voltage line.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 30, 2020
    Inventors: Shinsuke Nakano, Hiroaki Katsurai, Masafumi Nogawa, Shunji Kimura, Masatoshi Tobayashi, Shigehiro Kurita, Masahiro Endo
  • Publication number: 20190393841
    Abstract: An amplifier typically exemplified by a TIA is realized that provides an optimal band characteristic, that reduces the possibility of the oscillation, and that achieves a reduced dispersion of the band characteristics. An amplifier for amplifying an electric signal, comprising: a first buffer for amplifying the electric signal; a filter that is connected to an output of the first buffer and that includes a parallel circuit consisting of an inductor and a first capacity; and a second buffer connected to an output of the filter.
    Type: Application
    Filed: May 15, 2018
    Publication date: December 26, 2019
    Inventors: Masafumi Nogawa, Shinsuke Nakano, Hiroaki Sanjoh, Masatoshi Tobayashi, Yoshikazu Urabe, Masahiro Endo
  • Publication number: 20190245624
    Abstract: A driver circuit 11 includes a plurality of cascode-connected NMOS transistors, a modulating signal VGN1 is applied to a gate terminal of a lowermost stage transistor TN1 located at a lowermost stage out of the NMOS transistors, and an upper stage bias potential VGN2 that is a sum of a minimum gate-source voltage VGN1min and a maximum drain-source voltage VDS1max of a transistor (TN1) located immediately below an upper stage transistor located at an upper stage above the lowermost stage transistor of the NMOS transistors is applied to the upper stage transistor TN2.
    Type: Application
    Filed: October 16, 2017
    Publication date: August 8, 2019
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshiki KISHI, Munehiko NAGATANI, Shinsuke NAKANO, Hiroaki KATSURAI, Masafumi NOGAWA, Hideyuki NOSAKA
  • Patent number: 10243664
    Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: March 26, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Munehiko Nagatani, Hideyuki Nosaka, Toshihiro Itoh, Koichi Murata, Hiroyuki Fukuyama, Takashi Saida, Shin Kamei, Hiroshi Yamazaki, Nobuhiro Kikuchi, Hiroshi Koizumi, Masafumi Nogawa, Hiroaki Katsurai, Hiroyuki Uzawa, Tomoyoshi Kataoka, Naoki Fujiwara, Hiroto Kawakami, Kengo Horikoshi, Yves Bouvier, Mikio Yoneyama, Shigeki Aisawa, Masahiro Suzuki
  • Publication number: 20190068147
    Abstract: A positive-side power supply terminal (1-1a) of a differential amplifier (1-1) is connected to a positive-side power supply line (L1). A negative-side power supply terminal (1-2b) of a differential amplifier (1-2) is connected to a negative-side power supply line (L2). A negative-side power supply terminal (1-1b) of the differential amplifier (1-1) and a positive-side power supply terminal (1-2a) of the differential amplifier (1-2) are connected to each other. A final-stage amplifier (2) is connected between the positive-side power supply line (L1) and the negative-side power supply line (L2).
    Type: Application
    Filed: March 15, 2017
    Publication date: February 28, 2019
    Inventors: Shinsuke NAKANO, Masafumi NOGAWA, Hideyuki NOSAKA
  • Patent number: 9853618
    Abstract: A transimpedance amplifier circuit (1) includes an amplifier (22) that amplifies a received signal, an automatic gain control (AGC) circuit (2) that controls the amplification gain of the amplifier by a first time constant in accordance with the level of the received signal, and a first selection circuit (25) that selects the first time constant from a plurality of predetermined values. This can simultaneously implement a short time constant of an AGC function necessary to instantaneously respond to a burst signal and a long time constant of the AGC function necessary to obtain a satisfactory bit error rate (BER) characteristic in a continuous signal by an inexpensive and compact circuit arrangement.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: December 26, 2017
    Assignees: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT ELECTRONICS CORPORATION
    Inventors: Hiroshi Koizumi, Masafumi Nogawa, Masatoshi Tobayashi, Masahiro Endo
  • Publication number: 20160261246
    Abstract: A transimpedance amplifier circuit (1) includes an amplifier (22) that amplifies a received signal, an automatic gain control (AGC) circuit (2) that controls the amplification gain of the amplifier by a first time constant in accordance with the level of the received signal, and a first selection circuit (25) that selects the first time constant from a plurality of predetermined values. This can simultaneously implement a short time constant of an AGC function necessary to instantaneously respond to a burst signal and a long time constant of the AGC function necessary to obtain a satisfactory bit error rate (BER) characteristic in a continuous signal by an inexpensive and compact circuit arrangement.
    Type: Application
    Filed: September 26, 2014
    Publication date: September 8, 2016
    Inventors: Hiroshi KOIZUMI, Masafumi NOGAWA, Masatoshi TOBAYASHI, Masahiro ENDO
  • Publication number: 20160087727
    Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.
    Type: Application
    Filed: May 9, 2014
    Publication date: March 24, 2016
    Inventors: Munehiko Nagatani, Hideyuki Nosaka, Toshihiro Itoh, Koichi Murata, Hiroyuki Fukuyama, Takashi Saida, Shin Kamei, Hiroshi Yamazaki, Nobuhiro Kikuchi, Hiroshi Koizumi, Masafumi Nogawa, Hiroaki Katsurai, Hiroyuki Uzawa, Tomoyoshi Kataoka, Naoki Fujiwara, Hiroto Kawakami, Kengo Horikoshi, Yves Bouvier, Mikio Yoneyama, Shigeki Aisawa, Masahiro Suzuki
  • Patent number: 9160458
    Abstract: An optical signal detection circuit (10) includes an amplification circuit (11) that differentially amplifies an electrical signal (Tout) corresponding to the pulse train of an optical signal (Pin) and outputs a differential output signal (Aout), and a comparator (12) that compares the voltage value of the positive-phase signal of the differential output signal (Aout) with the voltage value of the negative-phase signal and outputs a pulsed comparison output signal (Cout) corresponding to the comparison result. The amplification circuit (11) includes a current addition circuit (11E) that adjusts a DC load current to generate a positive-phase signal (Aout+) and a negative-phase signal (Aout?) of the differential output signal (Aout) in accordance with an adjusted voltage value from an external adjusted voltage source (Vadj) and adjusts the DC bias of the positive-phase signal (Aout+) and the DC bias of the negative-phase signal (Aout?).
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: October 13, 2015
    Assignee: NIPPON TELEPHONE AND TELEGRAPH CORPORATION
    Inventors: Hiroshi Koizumi, Masafumi Nogawa, Yusuke Ohtomo
  • Patent number: 9025970
    Abstract: A comparator (11) outputs, out of an electrical signal input from a trans impedance amplifier (TIA) via a coupling capacitor, pulses having amplitudes equal to or larger than a reference value as a comparison output signal (Cout). An analog holding circuit (12) charges a holding capacitor with each pulse contained in the comparison output signal (Cout) and also removes a DC voltage obtained by the charging via a discharging resistor, thereby generating a holding output signal (Hout) that changes in accordance with the presence/absence of input of an optical signal. This allows to perform an autonomous operation without any necessity of an external control signal and properly detect the presence/absence of input of an optical signal.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: May 5, 2015
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa, Yoshikazu Urabe
  • Publication number: 20140016949
    Abstract: An optical signal detection circuit (10) includes an amplification circuit (11) that differentially amplifies an electrical signal (Tout) corresponding to the pulse train of an optical signal (Pin) and outputs a differential output signal (Aout), and a comparator (12) that compares the voltage value of the positive-phase signal of the differential output signal (Aout) with the voltage value of the negative-phase signal and outputs a pulsed comparison output signal (Cout) corresponding to the comparison result. The amplification circuit (11) includes a current addition circuit (11E) that adjusts a DC load current to generate a positive-phase signal (Aout+) and a negative-phase signal (Aout?) of the differential output signal (Aout) in accordance with an adjusted voltage value from an external adjusted voltage source (Vadj) and adjusts the DC bias of the positive-phase signal (Aout+) and the DC bias of the negative-phase signal (Aout?).
    Type: Application
    Filed: January 25, 2012
    Publication date: January 16, 2014
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Koizumi, Masafumi Nogawa, Yusuke Ohtomo
  • Publication number: 20130039649
    Abstract: A comparator (11) outputs, out of an electrical signal input from a trans impedance amplifier (TIA) via a coupling capacitor, pulses having amplitudes equal to or larger than a reference value as a comparison output signal (Cout). An analog holding circuit (12) charges a holding capacitor with each pulse contained in the comparison output signal (Cout) and also removes a DC voltage obtained by the charging via a discharging resistor, thereby generating a holding output signal (Hout) that changes in accordance with the presence/absence of input of an optical signal. This allows to perform an autonomous operation without any necessity of an external control signal and properly detect the presence/absence of input of an optical signal.
    Type: Application
    Filed: February 14, 2011
    Publication date: February 14, 2013
    Inventors: Hiroshi Koizumi, Kazuyoshi Nishimura, Masafumi Nogawa, Yoshikazu Urabe
  • Patent number: 7368954
    Abstract: Providing a CDR circuit having a stable clock extracting function and a data regenerating function with a high-speed data input process by reducing the operation speed of the phase comparator circuit. With a phase comparator circuit capable of operating with a clock signal whose period is 2 times the unit time width of the inputted data signal, the pulse width of the phase error signal, representing the difference in phase between the transition point of the data signal and the transition point of the clock signal, is extended as much as the unit time width of the data signal.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: May 6, 2008
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Yusuke Otomo, Masafumi Nogawa
  • Publication number: 20060050828
    Abstract: Providing a CDR circuit having a stable clock extracting function and a data regenerating function with a high-speed data input process by reducing the operation speed of the phase comparator circuit. With a phase comparator circuit capable of operating with a clock signal whose period is 2 times the unit time width of the inputted data signal, the pulse width of the phase error signal, representing the difference in phase between the transition point of the data signal and the transition point of the clock signal, is extended as much as the unit time width of the data signal.
    Type: Application
    Filed: March 4, 2004
    Publication date: March 9, 2006
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yusuke Otomo, Masafumi Nogawa
  • Patent number: 6393845
    Abstract: A pulse tube refrigerator which reduces valve losses in a cycle and improves refrigeration efficiency includes a pressure oscillator, a refrigerating portion, a first middle pressure buffer tank, a first middle pressure buffer side valve, a second middle pressure buffer tank and a second middle pressure buffer side valve. A regenerator in the refrigerating portion and an outlet port and an inlet port of a compressor in the pressure oscillator are connected via a high pressure valve and a low pressure valve respectively. A high temperature heat exchanger of the refrigerating portion and the first middle pressure buffer tank and the second middle pressure buffer tank are connected via the first middle pressure buffer side valve and the second middle pressure buffer side valve. The first middle pressure buffer tank and the second middle pressure buffer tank include different middle pressures which are predetermined between an output pressure and an input pressure of the compressor.
    Type: Grant
    Filed: October 30, 2000
    Date of Patent: May 28, 2002
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Masafumi Nogawa, Shin Kawano, Shaowei Zhu, Tatsuo Inoue
  • Patent number: 6389819
    Abstract: A pulse tube refrigerator includes a compressor, a first heat exchanger, a first regenerator, a first cold head, a first pulse tube, a first radiator, a second regenerator, a second cold head, a second pulse tube, a second radiator, an orifice and a buffer tank which are connected in series. A first cooling part consists of the first heat exchanger, the first regenerator, the first cold head, the first pulse tube and the first radiator. A second cooling part consists of the first radiator, the second regenerator, the second cold head, the second pulse tube and the second radiator. The first radiator forms not only the radiator of the first cooling part, but also the heat exchanger of the second cooling part.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: May 21, 2002
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Shaowei Zhu, Shin Kawano, Masafumi Nogawa, Tatsuo Inoue