Patents by Inventor Masaharu Kitaoka

Masaharu Kitaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7216072
    Abstract: A translation server system of the present invention provides a function of translating a document without feeling any stress irrespective of a performance of a user's own terminal device. A relay device for relaying request data from a terminal device to a server device and response data from the server device to the terminal device in response to the request data, includes a control unit for performing communications with a translation server for translating text information contained in the response data. The translation server translates the text information contained in the response data received from the server device, and a result of this translation is transmitted as response data to the terminal device.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: May 8, 2007
    Assignee: Fujitsu Limited
    Inventors: Satoshi Kasai, Masaharu Kitaoka, Itsuro Atobe, Fumiko Ito, Makoto Shiotsu
  • Patent number: 6591414
    Abstract: A binary program conversion apparatus capable of converting an original binary program into a new binary program which runs at higher speed in a target computer having a cache memory. The binary program conversion apparatus comprises an executing part, a generating part and a producing part. The executing part executes the original binary program. The generating part generates executed blocks information indicating first instruction blocks which are executed by the executing part. The producing part produces, based on the executed blocks information generated by the generating part, the new binary program which contains second instruction blocks corresponding to the plural of the first instruction blocks and which causes, when being executed in the computer, the computer to store second instruction blocks corresponding to the first instruction blocks executed by the executing part at different locations of the cache memory.
    Type: Grant
    Filed: October 3, 1997
    Date of Patent: July 8, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshinobu Hibi, Hidefumi Nishi, Toshiki Izuchi, Masaharu Kitaoka
  • Publication number: 20010018649
    Abstract: A translation server system of the present invention provides a function of translating a document without feeling any stress irrespective of a performance of a user's own terminal device. A relay device for relaying request data from a terminal device to a server device and response data from the server device to the terminal device in response to the request data, includes a control unit for performing communications with a translation server for translating text information contained in the response data. The translation server translates the text information contained in the response data received from the server device, and a result of this translation is transmitted as response data to the terminal device.
    Type: Application
    Filed: January 3, 2001
    Publication date: August 30, 2001
    Inventors: Satoshi Kasai, Masaharu Kitaoka, Itsuro Atobe, Fumiko Ito, Makoto Shiotsu
  • Publication number: 20010003822
    Abstract: A binary program conversion apparatus capable of converting an original binary program into a new binary program which runs at higher speed in a target computer having a cache memory. The binary program conversion apparatus comprises an executing part, a generating part and a producing part. The executing part executes the original binary program. The generating part generates executed blocks information indicating first instruction blocks which are executed by the executing part. The producing part produces, based on the executed blocks information generated by the generating part, the new binary program which contains second instruction blocks corresponding to the plural of the first instruction blocks and which causes, when being executed in the computer, the computer to store second instruction blocks corresponding to the first instruction blocks executed by the executing part at different locations of the cache memory.
    Type: Application
    Filed: October 3, 1997
    Publication date: June 14, 2001
    Applicant: Fujitsu Limited
    Inventors: YOSHINOBU HIBI, HIDEFUMI NISHI, TOSHIKI IZUCHI, MASAHARU KITAOKA