Abstract: A semiconductor device includes: a semiconductor layer in a rectangular shape in a plan view; a transistor provided in a first region; and a drain lead-out region provided in a second region. A border line is a straight line parallel to longer sides of the semiconductor layer. The first region includes a plurality of source pads and gate pads. The second region includes a plurality of drain pads. One gate pad among the gate pads is disposed to dispose none of the plurality of source pads between (i) the one gate pad and (ii) one longer side and one shorter side. One drain pad among the plurality of drain pads is in the same shape as the one gate pad and is disposed close to a second vertex. The plurality of source pads include a source pad that is in a rectangular shape or an obround shape having a longitudinal direction parallel to the longer sides of the semiconductor layer.

Abstract: A semiconductor device includes: a semiconductor layer in a rectangular shape in a plan view; a transistor provided in a first region; and a drain lead-out region provided in a second region. A border line is a straight line parallel to longer sides of the semiconductor layer. The first region includes a plurality of source pads and gate pads. The second region includes a plurality of drain pads. One gate pad among the gate pads is disposed to dispose none of the plurality of source pads between (i) the one gate pad and (ii) one longer side and one shorter side. One drain pad among the plurality of drain pads is in the same shape as the one gate pad and is disposed close to a second vertex. The plurality of source pads include a source pad that is in a rectangular shape or an obround shape having a longitudinal direction parallel to the longer sides of the semiconductor layer.

Abstract: In a first vertical field-effect transistor in which first source regions and first connectors each of which electrically connects a first body region and a first source electrode are alternately and periodically disposed in a first direction (Y direction) in which a first trench extends, a ratio of LS [?m] to LB [?m] is at least 1/7 and at most 1/3, where LS denotes a length of one of the first source regions in the first direction, and LB denotes a length of one of the first connectors in the first direction, and LB??0.024×(VGS)2+0.633×VGS?0.721 is satisfied for a voltage VGS [V] of a specification value of a semiconductor device, the voltage VGS being applied to a first gate conductor with reference to an electric potential of the first source electrode.

Abstract: In a first vertical field-effect transistor in which first source regions and first connectors each of which electrically connects a first body region and a first source electrode are alternately and periodically disposed in a first direction (Y direction) in which a first trench extends, a ratio of LS [?m] to LB [?m] is at least 1/7 and at most 1/3, where LS denotes a length of one of the first source regions in the first direction, and LB denotes a length of one of the first connectors in the first direction, and LB??0.024×(VGS)2+0.633×VGS?0.721 is satisfied for a voltage VGS [V] of a specification value of a semiconductor device, the voltage VGS being applied to a first gate conductor with reference to an electric potential of the first source electrode.

Abstract: To achieve a reduced number of components mounted on a printed wiring board, and a reduced mounting area of components. A MOSFET semiconductor device according to the present invention includes a transistor as a plurality of semiconductor layers formed in a semiconductor substrate, and includes a source electrode, a gate electrode, a drain electrode, and a gate insulating film. The MOSFET semiconductor device further includes an insulating film formed on a first principal surface of the semiconductor substrate, a resistance film formed on the insulating film and electrically connected with the drain electrode, and a resistance electrode formed on the resistance film and serving as a surface mount terminal. With this configuration, reduction can be achieved in the number of components mounted on the printed wiring board, and hence in the mounting area of the components, and heat generating in the resistance film can be transferred to the printed wiring board to prevent malfunction of a MOSFET due to heat.