Patents by Inventor Masahiko ARIMURA
Masahiko ARIMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240113238Abstract: An insulation module includes: a light-emitting element; a light-receiving element that receives light from the light-emitting element; a first die pad on which the light-emitting element is mounted; a second die pad that is provided in alignment with the first die pad and on which the light-receiving element is mounted; a transparent resin that at least covers both the light-emitting element and the light-receiving element; a reflection member that covers at least the transparent resin and is formed from a material that reflects light from the light-emitting element; and an encapsulation resin that encapsulates the reflection member as well as the transparent resin and is formed from a material having a light-blocking effect. At least one of the reflection member and the transparent resin includes inorganic particles that absorb or reflect light from the light-emitting element.Type: ApplicationFiled: December 12, 2023Publication date: April 4, 2024Inventors: Masahiko ARIMURA, Tomoichiro TOYAMA
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Publication number: 20240113239Abstract: This insulation module includes: a first light-emitting element and a first light-receiving element that constitute a photocoupler; a first plate-shaped member that has light-transmitting properties and is provided between the first light-receiving element and the first light-emitting element; an encapsulation resin that at least encapsulates the light-emitting element and the light-receiving element; and a plurality of terminals that are provided to a first plastic side surface of the encapsulation resin. The first plate-shaped member is layered on the light-receiving surface of the first light-receiving element, and the first light-emitting element is layered on the first plate-shaped member. Recessed-projecting portions are provided to sections between adjacent terminals among the plurality of terminals on the first plastic side surface.Type: ApplicationFiled: December 12, 2023Publication date: April 4, 2024Inventors: Masahiko ARIMURA, Tomoichiro TOYAMA
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Publication number: 20240113093Abstract: This insulation module comprises: a light-emitting element that has a light-emitting surface and a pad formed on the light-emitting surface; a light-receiving element that has a light-receiving surface facing the light-emitting surface with a space therebetween, and that constitutes a photocoupler together with the light-emitting element; a plate-shaped member that is provided between the light-emitting surface and the light-receiving surface, has light-transmitting and insulating properties, and is inclined with respect to both the light-emitting surface and the light-receiving surface; and a wire that is connected to the pad. The pad is disposed offset from the center toward a section among the light-emitting surface where the distance to the plate-shaped member increases.Type: ApplicationFiled: December 12, 2023Publication date: April 4, 2024Inventors: Masahiko ARIMURA, Tomoichiro TOYAMA
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Publication number: 20240096538Abstract: A signal transmission device is constituted by a transformer chip having, for example, a first wiring layer, a second wiring layer different from the first wiring layer, a primary winding formed in the first wiring layer, a secondary winding formed in the second wiring layer to be magnetically coupled with the primary winding, and a shield electrode formed to be interposed between the primary and secondary windings.Type: ApplicationFiled: January 12, 2022Publication date: March 21, 2024Inventors: Yusuke KITADA, Masahiko ARIMURA, Daiki YANAGISHIMA
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Patent number: 11923128Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.Type: GrantFiled: December 6, 2022Date of Patent: March 5, 2024Assignee: ROHM CO., LTD.Inventors: Taketoshi Tanaka, Kosei Osada, Masahiko Arimura
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Publication number: 20230387185Abstract: This semiconductor device is provided with: a high-voltage die pad and a low-voltage die pad, which are insulated from each other; a resistive element which is mounted on the high-voltage die pad; and a semiconductor element which is mounted on the low-voltage die pad. The resistive element is provided with: a substrate which is mounted on the high-voltage die pad; an insulating layer which is formed on the substrate; and a thin film resistive layer which is formed on the insulating layer.Type: ApplicationFiled: August 10, 2023Publication date: November 30, 2023Inventors: Masahiko ARIMURA, Daiki YANAGISHIMA
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Patent number: 11627023Abstract: In a transmission circuit, a first pulse signal with a first frequency and a second pulse signal with a second frequency are output according to a rising edge and a falling edge of a first input signal, respectively. When a second input signal indicates an active level, the second pulse signal is output according to the falling edge of the first input signal and the second frequency is changed to a third frequency. In a reception circuit, a first level of a first output signal is changed to a second level according to a first induced signal via a transformer, the second level of the first output signal is changed to the first level according to a second induced signal via the transformer, and a second output signal is changed to an active level when a frequency of the second induced signal has changed to the third frequency.Type: GrantFiled: January 27, 2022Date of Patent: April 11, 2023Assignees: DENSO CORPORATION, ROHM CO., LTD.Inventors: Junichi Hasegawa, Yusuke Michisita, Kazuma Takahashi, Daiki Yanagishima, Masahiko Arimura
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Publication number: 20230107689Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.Type: ApplicationFiled: December 6, 2022Publication date: April 6, 2023Inventors: Taketoshi TANAKA, Kosei OSADA, Masahiko ARIMURA
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Patent number: 11545299Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.Type: GrantFiled: October 15, 2018Date of Patent: January 3, 2023Assignee: ROHM CO., LTD.Inventors: Taketoshi Tanaka, Kosei Osada, Masahiko Arimura
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Publication number: 20220150096Abstract: In a transmission circuit, a first pulse signal with a first frequency and a second pulse signal with a second frequency are output according to a rising edge and a falling edge of a first input signal, respectively. When a second input signal indicates an active level, the second pulse signal is output according to the falling edge of the first input signal and the second frequency is changed to a third frequency. In a reception circuit, a first level of a first output signal is changed to a second level according to a first induced signal via a transformer, the second level of the first output signal is changed to the first level according to a second induced signal via the transformer, and a second output signal is changed to an active level when a frequency of the second induced signal has changed to the third frequency.Type: ApplicationFiled: January 27, 2022Publication date: May 12, 2022Inventors: Junichi HASEGAWA, Yusuke MICHISITA, Kazuma TAKAHASHI, Daiki YANAGISHIMA, Masahiko ARIMURA
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Publication number: 20210193380Abstract: An electronic component includes an insulating layer, a low voltage conductor pattern formed inside the insulating layer, a high voltage conductor pattern formed inside the insulating layer such as to face the low voltage conductor pattern in an up/down direction, and a withstand voltage enhancement structure of conductive property formed inside the insulating layer and along the high voltage conductor pattern such as to protrude further outside than the low voltage conductor pattern in plan view.Type: ApplicationFiled: October 15, 2018Publication date: June 24, 2021Inventors: Taketoshi TANAKA, Kosei OSADA, Masahiko ARIMURA
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Patent number: 10756715Abstract: A pulse generation circuit has: an edge detector detecting a pulse edge in an input signal to generate edge detection signals; a clock generator generating a clock signal according to the edge detection signals; a frequency divider dividing the frequency of the clock signal to generate a frequency-divided clock signal; an input pad for receiving a test mode switch signal from a tester; and an output pad for outputting the frequency-divided clock signal to the tester. The edge detector can generate the edge detection signals by detecting a pulse edge not in the input signal but in the clock signal or in the inverted clock signal obtained by inverting the logic level of the clock signal when the test mode switch signal is being fed in. The signal delay time in the edge detector is adjustable according to the period of the frequency-divided clock signal as measured by the tester.Type: GrantFiled: June 26, 2019Date of Patent: August 25, 2020Assignee: Rohm Co., Ltd.Inventor: Masahiko Arimura
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Publication number: 20200014375Abstract: A pulse generation circuit has: an edge detector detecting a pulse edge in an input signal to generate edge detection signals; a clock generator generating a clock signal according to the edge detection signals; a frequency divider dividing the frequency of the clock signal to generate a frequency-divided clock signal; an input pad for receiving a test mode switch signal from a tester; and an output pad for outputting the frequency-divided clock signal to the tester. The edge detector can generate the edge detection signals by detecting a pulse edge not in the input signal but in the clock signal or in the inverted clock signal obtained by inverting the logic level of the clock signal when the test mode switch signal is being fed in. The signal delay time in the edge detector is adjustable according to the period of the frequency-divided clock signal as measured by the tester.Type: ApplicationFiled: June 26, 2019Publication date: January 9, 2020Applicant: ROHM CO., LTD.Inventor: Masahiko ARIMURA