Abstract: The present invention provides a method of producing a liposome encapsulating an ammine platinum complex. The method includes A) providing a water-soluble ammine platinum complex, platinum complex raw materials or the combination thereof; B) providing a liposome, liposome raw materials or the combination; and C) preparing a mixture of the water-soluble ammine platinum complex, platinum complex raw materials or the combination thereof and the liposome, liposome raw materials or the combination thereof and subjecting it to a liposome-forming/maintaining condition, wherein the salt of the platinum complex forms when the liposome is in a water-soluble form.

Abstract: The present invention provides a glycolipid-containing liposome. In such a glycolipid-containing liposome, the glycolipid includes a plant ceramide portion and a sugar chain portion. The present invention also provides a method of producing a glycolipid-containing liposome. This method includes the following steps of: A) providing a glycolipid in which the glycolipid includes a plant ceramide portion and a sugar chain portion; and B) mixing the provided glycolipid with a liposome raw material and subjecting the mixture to conditions in which a liposome is formed.

Abstract: The present invention provides a method of producing a liposome encapsulating an ammine platinum complex. The method includes A) providing a water-soluble ammine platinum complex, platinum complex raw materials or the combination thereof; B) providing a liposome, liposome raw materials or the combination; and C) preparing a mixture of the water-soluble ammine platinum complex, platinum complex raw materials or the combination thereof and the liposome, liposome raw materials or the combination thereof and subjecting it to a liposome-forming/maintaining condition, wherein the salt of the platinum complex forms when the liposome is in a water-soluble form.

Abstract: A pad block is provided with a pad, an output buffer circuit and an internal circuit. The region between the internal circuit and the output buffer circuit serves as an element arrangement forbidden region. In this region, the internal circuit and the output buffer circuit are connected to each other by, for example, a polysilicon layer. The internal circuit is connected to a circuit formed in an internal region of a chip by using at least two wiring layers passing the element arrangement forbidden region. By laying out the wiring connecting the internal circuit within the pad block to the circuit in the internal region of the chip in the element arrangement forbidden region provided within the pad block, it is possible to reduce a space necessary for wiring and thereby to realize a highly integrated device.

Abstract: A pulse generating circuit for producing the clock signal of a microcomputer is improved to reduce the dependence of noise elimination on power supply voltage. Clock pulses from an oscillator are subjected to waveform shaping and then are frequency-divided by a frequency divider circuit. A selector circuit is provided to select the input signal to or an output signal from the frequency divider circuit. A noise eliminating circuit is provided on the output side of the selector circuit. This arrangement makes it possible to generate noise-free pulses over a wide range of operating power supply voltages.

Abstract: In an analogue delay circuit which is constructed from a p-type MOS transistor and an n-type MOS transistor and which includes an inverter gate for inputting input signals and a capacitance having one electrode connected to ground and the other electrode connected to the drain of the inverter gate, the gate potential of the n-type MOS transistor is limited by means of a clamping circuit so as not to exceed the minimum operating voltage, and the potential of a line connected to an electrode of the capacitance is limited by another clamping circuit so as to not exceed the minimum operating voltage.

Abstract: A delay circuit comprising at least one capacitor with one electrode thereof is connected to a fixed potential, a signal transmission line, and at least one switch means between the other electrode of the capacitor and the signal transmission line. The switch means makes electrical connection or disconnection between the capacitor and the signal transmission line in accordance with an actual supply voltage value.