Patents by Inventor Masahiko Kasuga

Masahiko Kasuga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7514745
    Abstract: A semiconductor device which has a substrate formed as a rigid body, includes stress relaxation layers formed by filling in concave portions defined in a first main surface of the substrate, and a device forming layer which covers part of the first main surface and is formed in the substrate. The substrate is made up of a material larger than the stress relaxation layers and the device forming layer in thermal expansion coefficient. Side faces of the device forming layer are electrically connected to their corresponding upper surfaces of the stress relaxation layers in an electrically non-conducting state via insulative stress transfer layers formed on the upper surfaces.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: April 7, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Masahiko Kasuga
  • Publication number: 20060226486
    Abstract: The present invention provides a semiconductor device which has a substrate formed as a rigid body, stress relaxation layers formed by filling in concave portions defined in a first main surface of the substrate, and a device forming layer which covers part of the first main surface and is formed in the substrate. The substrate is made up of a material larger than the stress relaxation layers and the device forming layer in thermal expansion coefficient. Side faces of the device forming layer are electrically connected to their corresponding upper surfaces of the stress relaxation layers in an electrically non-conducting state via insulative stress transfer layers formed on the upper surfaces.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 12, 2006
    Inventor: Masahiko Kasuga