Patents by Inventor Masahiko Ohno

Masahiko Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6064185
    Abstract: A circuit preventing battery from over discharging, which is able to prevent battery from over discharging during the time that a DC/DC converter stops the operation, even at the state that the battery is discharged and needs to be recharged, is provided. The circuit preventing battery from over discharging provides a first p type MOS transistor whose gate cut voltage is V1, a second p type MOS transistor whose gate cut voltage V2 and V2<V1, a light emitting section of photocoupler which is connected to the drain of the first p type MOS transistor and the gate of first p type MOS transistor and a light receiving section of photocoupler which connects to the drain of the first p type MOS transistor and the drain of the second p type MOS transistor, and becomes on state at the time when a current flows into the light emitting section of photocoupler. With this construction, by preventing battery from over discharging, making the battery life long and shortening the recharging time are possible.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: May 16, 2000
    Assignee: NEC Corporation
    Inventor: Masahiko Ohno
  • Patent number: 5818905
    Abstract: A measurement method and measuring circuit are described for high-speed measurement of subscriber line impedance without the influence of counter electromotive force of the bell circuit or hum noise. A measurement current is supplied from a controlled-current source to each of a pair of subscriber lines by way of switches, and subscriber line voltage and current values are measured during the transient state. A measurement time interval is divided into a first-half and a second-half interval, the average values of the voltage and current are detected for each time interval, and moreover, the difference between voltages at the beginning and end of each time interval is detected. In this case, the controlled-current source is controlled by a control means such that the rate of change of the current value over time remains at or below a fixed value.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: October 6, 1998
    Assignee: NEC Corporation
    Inventor: Masahiko Ohno
  • Patent number: 5218323
    Abstract: A transistor direct-coupled amplifier includes a positive-phase direct-coupled amplifier circuit, a second transistor, and a low-pass filter. The positive-phase direct-coupled amplifier circuit uses a base of a first transistor as an input terminal. The second transistor has a collector connected to the input terminal of the positive-phase direct-coupled amplifier circuit and an emitter connected to a reference voltage source, and the second transistor is complementary with the first transistor. A low-pass filter receives an output from the positive-phase direct-coupled amplifier circuit as an input, and the low-pass filter is connected to feed back an output to a base of the second transistor.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: June 8, 1993
    Assignee: NEC Corporation
    Inventor: Masahiko Ohno