Patents by Inventor Masahiro Ichihashi

Masahiro Ichihashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230261623
    Abstract: To improve stability of a reference current in a current source circuit that generates the reference current by using capacitors. The current source circuit includes a pair of capacitors, a switching circuit, an operational amplifier, and an output transistor. The switching circuit charges one of the pair of capacitors with a predetermined charging current, and transfers electric charge from the one of the pair of capacitors to the other of the pair of capacitors. The operational amplifier amplifies a difference between the terminal voltage of the other of the pair of capacitors and a predetermined reference voltage and outputs the difference that has been amplified as an output voltage. The output transistor outputs a current corresponding to the output voltage as a reference current.
    Type: Application
    Filed: April 27, 2021
    Publication date: August 17, 2023
    Inventors: MASAHIRO ICHIHASHI, MASAYUKI KATAKURA, KAZUMASA NISHIMURA, TETSUYA TASHIRO, NOBUHIKO SHIGYO
  • Publication number: 20230049639
    Abstract: To reduce power consumption of a driver circuit used in a vertical drive circuit of an image processing device. In the driver circuit, a drive signal output circuit outputs a drive signal in accordance with a predetermined trigger signal. Furthermore, at a time of rising of the drive signal, a step-up switch sequentially selects a plurality of voltages in ascending order, and supplies the selected voltage to the drive signal output circuit. Moreover, at a time of falling of the drive signal, a step-down switch sequentially selects a plurality of voltages in descending order, and supplies the selected voltage to the drive signal output circuit.
    Type: Application
    Filed: December 28, 2020
    Publication date: February 16, 2023
    Inventor: MASAHIRO ICHIHASHI
  • Patent number: 11502647
    Abstract: Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: November 15, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kazumasa Nishimura, Masahiro Ichihashi, Masayuki Katakura, Kenya Kondou, Tetsuya Tashiro, Boyang Hao, Kouzi Tsukamoto
  • Patent number: 11476853
    Abstract: A level shift circuit includes an input section to which input signal of a first power supply system is input, a supply section that includes a pair of nodes, and a regulator. The supply section is connected to one of a pair of power supply lines serving as a second power supply system of which a voltage level is higher than a voltage level of the first power supply system, the supply section supplying a potential of the one of the pair of power supply lines to one of the pair of nodes according to the input signal. The regulator is connected to another of the pair of power supply lines, the regulator regulating current flowing between the one of the pair of nodes that is supplied with the potential of the one of the pair of power supply lines, and the other of the pair of power supply lines.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: October 18, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masahiro Ichihashi, Tetsuya Tashiro, Yasunori Tsukuda
  • Patent number: 11271476
    Abstract: A charge pump circuit by which fundamental issues involved in the voltage feedback type charge pump circuit have been solved is realized. A power supply circuit includes a charge pump circuit, a feedback circuit feeding an output of the charge pump circuit back to an input of the charge pump circuit, a first current source causing a constant current to flow through the feedback circuit, a MOS transistor element interposed in a middle of the feedback circuit, a resistor element interposed at a position closer to the output of the charge pump circuit than the MOS transistor element in the feedback circuit, a bias circuit applying a constant voltage to a control terminal of the MOS transistor element, and a control section controlling a value of the constant current which the first current source flows through the feedback circuit.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: March 8, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masahiro Ichihashi, Kenya Kondou, Kazumasa Nishimura, Syou Mitsuishi, Toshio Suzuki, Nobuhiko Shigyo, Masayuki Katakura, Motoyasu Yano
  • Publication number: 20220014194
    Abstract: A level shift circuit according to an embodiment of the present technology includes an input section, a supply section, and a regulator. An input signal of a first power supply system is input to the input section. The supply section includes a pair of nodes, the supply section being connected to one of a pair of power supply lines serving as a second power supply system of which a voltage level is higher than a voltage level of the first power supply system, the supply section supplying a potential of the one of the pair of power supply lines to one of the pair of nodes according to the input signal. The regulator is connected to another of the pair of power supply lines, the regulator regulating current flowing between the one of the pair of nodes that is supplied with the potential of the one of the pair of power supply lines, and the other of the pair of power supply lines.
    Type: Application
    Filed: November 6, 2019
    Publication date: January 13, 2022
    Inventors: MASAHIRO ICHIHASHI, TETSUYA TASHIRO, YASUNORI TSUKUDA
  • Patent number: 11165343
    Abstract: An object of the present technology is to stably operate a power supply circuit. A charge switch is connected to a first terminal of a capacitor and charges the capacitor with an input voltage on the basis of a control signal inputted to a control terminal. A discharge switch is complementary with the charge switch, is connected to the first terminal of the capacitor, and discharges on the basis of the control signal inputted to the control terminal the voltage charged to the capacitor, thereby generating an output voltage. A charge control signal converting section converts a charge control signal that controls the charge into a control signal referenced to the input voltage and inputs the resulting control signal to the control terminal of the charge switch. A discharge control signal converting section converts a discharge control signal that controls the discharge into a control signal referenced to the output voltage and inputs the resulting control signal to the control terminal of the discharge switch.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: November 2, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masahiro Ichihashi, Kenya Kondou, Kazumasa Nishimura, Syou Mitsuishi, Toshio Suzuki, Nobuhiko Shigyo, Masayuki Katakura, Motoyasu Yano
  • Publication number: 20210281169
    Abstract: A charge pump circuit by which fundamental issues involved in the voltage feedback type charge pump circuit have been solved is realized. A power supply circuit includes a charge pump circuit, a feedback circuit feeding an output of the charge pump circuit back to an input of the charge pump circuit, a first current source causing a constant current to flow through the feedback circuit, a MOS transistor element interposed in a middle of the feedback circuit, a resistor element interposed at a position closer to the output of the charge pump circuit than the MOS transistor element in the feedback circuit, a bias circuit applying a constant voltage to a control terminal of the MOS transistor element, and a control section controlling a value of the constant current which the first current source flows through the feedback circuit.
    Type: Application
    Filed: April 24, 2018
    Publication date: September 9, 2021
    Inventors: MASAHIRO ICHIHASHI, KENYA KONDOU, KAZUMASA NISHIMURA, SYOU MITSUISHI, TOSHIO SUZUKI, NOBUHIKO SHIGYO, MASAYUKI KATAKURA, MOTOYASU YANO
  • Publication number: 20210242838
    Abstract: To easily adjust a gain of an amplifier. An applied input signal is input to a gate terminal of a first transistor, and a current depending on the applied input signal flows through the first transistor. A load section is connected to a drain terminal of the first transistor. A gate terminal of a second transistor is connected to the load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 5, 2021
    Inventors: KAZUMASA NISHIMURA, MASAHIRO ICHIHASHI, MASAYUKI KATAKURA, KENYA KONDOU, TETSUYA TASHIRO, BOYANG HAO, KOUZI TSUKAMOTO
  • Publication number: 20210152083
    Abstract: An object of the present technology is to stably operate a power supply circuit. A charge switch is connected to a first terminal of a capacitor and charges the capacitor with an input voltage on the basis of a control signal inputted to a control terminal. A discharge switch is complementary with the charge switch, is connected to the first terminal of the capacitor, and discharges on the basis of the control signal inputted to the control terminal the voltage charged to the capacitor, thereby generating an output voltage. A charge control signal converting section converts a charge control signal that controls the charge into a control signal referenced to the input voltage and inputs the resulting control signal to the control terminal of the charge switch. A discharge control signal converting section converts a discharge control signal that controls the discharge into a control signal referenced to the output voltage and inputs the resulting control signal to the control terminal of the discharge switch.
    Type: Application
    Filed: May 1, 2018
    Publication date: May 20, 2021
    Inventors: MASAHIRO ICHIHASHI, KENYA KONDOU, KAZUMASA NISHIMURA, SYOU MITSUISHI, TOSHIO SUZUKI, NOBUHIKO SHIGYO, MASAYUKI KATAKURA, MOTOYASU YANO
  • Patent number: 10566954
    Abstract: A capacitor bank has a capacitance value that is discontinuous and has an extremely narrow variable range. Thus, in a case of obtaining a wide variable range of the capacitance value, a large number of capacitors are connected in parallel and used while being switched by switches. The present technology achieves at least one of: allowing the capacitance value of a variable capacitance circuit to be varied continuously by electrical control without increasing the parasitic capacitance; and decreasing the current consumption of an oscillator circuit using the variable capacitance circuit as compared to a conventional case. The variable capacitance circuit includes: a transconductance circuit that includes a MOS transistor; an inductor that is connected in parallel to the transconductance circuit; and a Gm control circuit that varies a transconductance of the MOS transistor.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: February 18, 2020
    Assignee: SONY CORPORATION
    Inventor: Masahiro Ichihashi
  • Publication number: 20190020330
    Abstract: A capacitor bank has a capacitance value that is discontinuous and has an extremely narrow variable range. Thus, in a case of obtaining a wide variable range of the capacitance value, a large number of capacitors are connected in parallel and used while being switched by switches. The present technology achieves at least one of: allowing the capacitance value of a variable capacitance circuit to be varied continuously by electrical control without increasing the parasitic capacitance; and decreasing the current consumption of an oscillator circuit using the variable capacitance circuit as compared to a conventional case. The variable capacitance circuit includes: a transconductance circuit that includes a MOS transistor; an inductor that is connected in parallel to the transconductance circuit; and a Gm control circuit that varies a transconductance of the MOS transistor.
    Type: Application
    Filed: December 6, 2016
    Publication date: January 17, 2019
    Inventor: MASAHIRO ICHIHASHI
  • Patent number: 7312629
    Abstract: A method and apparatus are provided for a programmable impedance control circuit. In one example of the apparatus, a programmable impedance control circuit of an output driver of an input/output interface is provided. The programmable impedance control circuit includes a pull-up impedance programmed according to a multi-stage emulator and a pull-down impedance programmed according to the multi-stage emulator. The multi-stage emulator includes a first stage for calibrating a pull-up PMOS impedance at a voltage level Voh, a second stage for calibrating a pull-up NMOS impedance at a voltage level Vol, a third stage for calibrating a pull-down NMOS impedance at the voltage level Vol, a fourth stage for re-calibrating the pull-up NMOS impedance at the voltage level Vol, and fifth stage for calibrating a pull-down PMOS impedance at the voltage level Voh.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: December 25, 2007
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Mu-Hsiang Huang, Katsuya Nakashima, Yoshifumi Miyajima, Masahiro Ichihashi
  • Publication number: 20070268039
    Abstract: A method and apparatus are provided for a programmable impedance control circuit. In one example of the apparatus, a programmable impedance control circuit of an output driver of an input/output interface is provided. The programmable impedance control circuit includes a pull-up impedance programmed according to a multi-stage emulator and a pull-down impedance programmed according to the multi-stage emulator. The multi-stage emulator includes a first stage for calibrating a pull-up PMOS impedance at a voltage level Voh, a second stage for calibrating a pull-up NMOS impedance at a voltage level Vol, a third stage for calibrating a pull-down NMOS impedance at the voltage level Vol, a fourth stage for re-calibrating the pull-up NMOS impedance at the voltage level Vol, and fifth stage for calibrating a pull-down PMOS impedance at the voltage level Voh.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 22, 2007
    Inventors: Mu-Hsiang Huang, Katsuya Nakashima, Yoshifumi Miyajima, Masahiro Ichihashi