Patents by Inventor Masahiro Ishiwata
Masahiro Ishiwata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11926730Abstract: A polypropylene film which is capable of suppressing blocking in a rolled polypropylene film. The polypropylene film has a first surface and a second surface, contains a polypropylene resin as a main component, and is configured such that: the Svk value (SvkA) of the first surface is 0.005 ?m or more and 0.030 ?m or less; the Spk value (SpkA) of the first surface is more than 0.035 ?m and 0.080 ?m or less; the Svk value (SvkB) of the second surface is 0.005 ?m or more and 0.030 ?m or less; and the Spk value (SpkB) of the second surface is 0.015 ?m or more and 0.035 ?m or less.Type: GrantFiled: April 17, 2023Date of Patent: March 12, 2024Assignee: Oji Holdings CorporationInventors: Tatsuji Ishida, Yoshimune Okuyama, Masahiro Nakata, Tadakazu Ishiwata
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Publication number: 20220066666Abstract: An information processing apparatus includes a processor connected to a programmable logic circuit. The processor is configured to: upon initialization, reconfigure a first region of the programmable logic circuit as a first memory that stores data; reconfigure a second region different from the first region of the programmable logic circuit as a first arithmetic circuit that uses the first memory; and, in a case where the second region reconfigured as the first arithmetic circuit is reconfigured as a second arithmetic circuit different from the first arithmetic circuit, allow the second arithmetic circuit to use the first memory.Type: ApplicationFiled: January 15, 2021Publication date: March 3, 2022Applicant: FUJIFILM BUSINESS INNOVATION CORP.Inventor: Masahiro ISHIWATA
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Patent number: 10795689Abstract: A reconfigurable logical circuit includes a data processing unit; a memory in which plural combinations of configuration control bits are stored; and a selector unit that selectively switches the plural combinations of configuration control bits stored in the memory and supplies a selected one of the plural combinations of configuration control bits to the data processing unit to reconfigure processing contents of the data processing unit.Type: GrantFiled: February 24, 2017Date of Patent: October 6, 2020Assignee: FUJI XEROX CO., LTD.Inventors: Ryo Kukimiya, Masatomo Igarashi, Masahiro Ishiwata, Junichi Uchiyama, Hirofumi Sasaki, Mitsuyuki Tamatani, Kazuo Yamada
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Patent number: 10782975Abstract: An information processing apparatus includes a dynamic reconfiguration device and a processor. The dynamic reconfiguration device has a first region with a static configuration, a second region with a changeable configuration, a switch used for bypassing between input and output terminals of the second region, and a crossbar switch used for switching a connection between the first region and the second region. The processor is configured to set a writing destination for a circuit to be reconfigured based on a resource to be used by the circuit if the circuit is to be written in the second region.Type: GrantFiled: January 24, 2020Date of Patent: September 22, 2020Assignee: FUJI XEROX CO., LTD.Inventor: Masahiro Ishiwata
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Publication number: 20190114110Abstract: A data processing device includes a software processing section that performs software processing on data, a hardware processing section that performs hardware processing on data, and a memory that stores data transmitted and received between the software processing section and the hardware processing section and sequentially outputs the stored data to the hardware processing section.Type: ApplicationFiled: May 28, 2018Publication date: April 18, 2019Applicant: FUJI XEROX CO.,LTD.Inventors: Masatomo IGARASHI, Masahiro ISHIWATA, Tsutomu NAGAOKA, Yoshinori AWATA
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Publication number: 20180060096Abstract: A reconfigurable logical circuit includes a data processing unit; a memory in which plural combinations of configuration control bits are stored; and a selector unit that selectively switches the plural combinations of configuration control bits stored in the memory and supplies a selected one of the plural combinations of configuration control bits to the data processing unit to reconfigure processing contents of the data processing unit.Type: ApplicationFiled: February 24, 2017Publication date: March 1, 2018Applicant: FUJI XEROX CO., LTD.Inventors: Ryo KUKIMIYA, Masatomo IGARASHI, Masahiro ISHIWATA, Junichi UCHIYAMA, Hirofumi SASAKI, Mitsuyuki TAMATANI, Kazuo YAMADA
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Patent number: 9679232Abstract: An electronic apparatus includes the following elements. A circuit forming device forms a circuit configured in accordance with configuration information. A first storage unit stores first configuration information externally obtained via a first communication line. The first configuration information is used for forming a first circuit implementing a function including a first communication function in the circuit forming device. A second storage unit stores second configuration information different from the first configuration information. The second configuration information is used for forming a second circuit implementing a function including the first communication function in the circuit forming device.Type: GrantFiled: March 8, 2016Date of Patent: June 13, 2017Assignee: FUJI XEROX CO., LTD.Inventors: Tatsuji Shimizu, Yoshinori Awata, Masahiro Ishiwata, Tsutomu Nagaoka, Keiichi Ito
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Publication number: 20170061266Abstract: An electronic apparatus includes the following elements. A circuit forming device forms a circuit configured in accordance with configuration information. A first storage unit stores first configuration information externally obtained via a first communication line. The first configuration information is used for forming a first circuit implementing a function including a first communication function in the circuit forming device. A second storage unit stores second configuration information different from the first configuration information. The second configuration information is used for forming a second circuit implementing a function including the first communication function in the circuit forming device.Type: ApplicationFiled: March 8, 2016Publication date: March 2, 2017Applicant: FUJI XEROX CO., LTD.Inventors: Tatsuji SHIMIZU, Yoshinori AWATA, Masahiro ISHIWATA, Tsutomu NAGAOKA, Keiichi ITO
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Patent number: 9233530Abstract: According to a drive control method and apparatus, an offset printing section and an intaglio printing section are connected together by a gear train. Separately from an offset printing section prime motor for driving an entire sheet-fed printing press, an intaglio printing section auxiliary motor is provided in the intaglio printing section where load is heaviest and load variations are great. By so doing, the entire sheet-fed printing press is driven by the offset printing section prime motor and the intaglio printing section auxiliary motor. Moreover, the electric current value (driving torque value) of the intaglio printing section auxiliary motor is controlled in accordance with an electric current value (torque value) for driving the offset printing section prime motor, the torque distribution rate of the intaglio printing section auxiliary motor, and the rated electric current value of the intaglio printing section auxiliary motor.Type: GrantFiled: February 7, 2011Date of Patent: January 12, 2016Assignee: KOMORI CORPORATIONInventors: Masahiro Ishiwata, Shigeru Yanagawa, Kouichi Katsumata, Mikio Matsumoto, Tatsuhiko Yokochi, Hiromitsu Numauchi, Kenji Hayashi
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Publication number: 20110192298Abstract: According to a drive control method and apparatus, an offset printing section and an intaglio printing section are connected together by a gear train. Separately from an offset printing section prime motor for driving an entire sheet-fed printing press, an intaglio printing section auxiliary motor is provided in the intaglio printing section where load is heaviest and load variations are great. By so doing, the entire sheet-fed printing press is driven by the offset printing section prime motor and the intaglio printing section auxiliary motor. Moreover, the electric current value (driving torque value) of the intaglio printing section auxiliary motor is controlled in accordance with an electric current value (torque value) for driving the offset printing section prime motor, the torque distribution rate of the intaglio printing section auxiliary motor, and the rated electric current value of the intaglio printing section auxiliary motor.Type: ApplicationFiled: February 7, 2011Publication date: August 11, 2011Applicant: KOMORI CORPORATIONInventors: Masahiro ISHIWATA, Shigeru YANAGAWA, Kouichi KATSUMATA, Mikio MATSUMOTO, Tatsuhiko YOKOCHI, Hiromitsu NUMAUCHI, Kenji HAYASHI
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Patent number: 5894312Abstract: An image processing apparatus is disclosed which is connected to external machines for inputting data therefrom to a plurality of image memories and outputting data from the plurality of image memories thereto. The image processing apparatus includes a plurality of memory access controllers connected to the plurality of image memories, and a control device for selecting, a first mode for the plurality of memory access controllers to access the image memories separately, or a second mode for a master controller, which is one of the memory access controllers, to access the plurality of image memories as one image memory space so a to control the plurality of memory access controllers.Type: GrantFiled: May 5, 1997Date of Patent: April 13, 1999Assignee: Fuji Xerox Co., Ltd.Inventors: Masahiro Ishiwata, Takeshi Suda
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Patent number: 5717874Abstract: In an image input/output control apparatus having three lines of n-bit bidirectional data buses provided on an external apparatus connection side of the apparatus and four lines of n-bit bidirectional data buses provided on an image memory side of the apparatus, there are provided a first inner register for setting the data transfer direction of each of the bidirectional data buses and a second inner register for setting an image valid area, whereby the data transfer direction of each of the bidirectional data buses is determined by a set point of the first inner register and the image valid area is determined by a set point of the second inner register.Type: GrantFiled: April 19, 1995Date of Patent: February 10, 1998Assignee: Fuji Xerox Co., Ltd.Inventor: Masahiro Ishiwata
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Patent number: 5436733Abstract: A texture image processing system for image processing apparatus comprises, first calculator for calculating a maximum value and a minimum value of texture image data; second calculator for calculating an average value and a gain value with employment of said maximum value and minimum value; and synthesizing processor for synthesizing texture image data by image picture data, this synthesizing processor synthesizing the texture image data with the image picture data by multiplying a difference between the texture image data and the average value by the gain value. Also, synthesizing processor synthesizes the texture image data with chromaticity information of the image picture data, or chromaticity information of the image picture data with predetermined chromaticity information, chromaticity information of the texture image data.Type: GrantFiled: May 13, 1992Date of Patent: July 25, 1995Assignee: Fuji Xerox Co. Ltd.Inventors: Yoshihiro Terada, Kazuyasu Sasuga, Katuyuki Kouno, Kazuman Taniuchi, Masahiro Ishiwata
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Patent number: 5414529Abstract: An image processing system assigns weight factors to two respective image signals of the equivalent color space so that the two image signals are combined according to the respective weight factors. For example, two weight factors having a sum of unity are assigned to the respective image signals. Alternatively, two weight factors are assigned independently.Type: GrantFiled: May 13, 1992Date of Patent: May 9, 1995Assignee: Fuji Xerox Co., Ltd.Inventors: Yoshihiro Terada, Kazuyasu Sasuga, Katuyuki Kouno, Kazuman Taniuchi, Hiroshi Sekine, Masahiro Ishiwata
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Patent number: 5189529Abstract: A reduction/enlargement processing system for an image processing apparatus of the type in which a line sensor is moved in a secondary scan direction while an image on an original is read by the line sensor in a main scan direction, comprising, line buffers for retaining image data for two lines, an interpolation processing circuit for applying a 2-point interpolation to the image data when the image data is written into or read out of the buffers, and a control circuit for controlling the writing data to and read data from the buffers and the interpolation circuit. Further, selectors are provided on the data input side and the data output side, and on the buffer side. The interpolation circuit is connected between the selectors. The line buffers are alternately selected for the read/write of image data. With use of the selectors, the 2-point interpolation may be applied to the image data or the image data may be directly processed.Type: GrantFiled: November 30, 1989Date of Patent: February 23, 1993Assignee: Fuji Xerox Co., Ltd.Inventors: Masahiro Ishiwata, Noriaki Tsuchiya, Teruyuki Aoyama, Akihiko Fusatani
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Patent number: 5132786Abstract: Conversion/non-conversion of input image data into replacing color data is controlled by a color converting system to produce output image data. Color detecting means detects a comparision color from the input image data by judging whether the input image data is within a preset comparison color range. Selecting means selects and outputs the input image data or the replacing color data provided by replacing color means on the basis of a judgment in the color detecting means.Type: GrantFiled: February 27, 1990Date of Patent: July 21, 1992Assignee: Fuji Xerox Co., Ltd.Inventor: Masahiro Ishiwata