Patents by Inventor Masahiro Tomida

Masahiro Tomida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10976627
    Abstract: An active matrix substrate of an embodiment includes a plurality of TFTs provided in a peripheral circuit region. The plurality of TFTs includes a TFT (10A) in which, when viewed in a direction perpendicular to a substrate (11A), a length in the channel width direction of a source electrode region (15AR) and a length in the channel width direction of a drain electrode region (16AR), WAs and WAd, are each smaller than a length in the channel width direction of the oxide semiconductor layer (14A), WAos, the length in the channel width direction of the oxide semiconductor layer (14A), WAos, is smaller than a length in the channel width direction of a gate electrode (12A), WAg, and a region in which at least one of the source electrode region (15AR) and the drain electrode region (16AR) is in contact with the oxide semiconductor layer(14A) entirely overlaps the gate electrode (12A).
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: April 13, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Masahiro Tomida
  • Publication number: 20200301182
    Abstract: An active matrix substrate of an embodiment includes a plurality of TFTs provided in a peripheral circuit region. The plurality of TFTs includes a TFT (10A) in which, when viewed in a direction perpendicular to a substrate (11A), a length in the channel width direction of a source electrode region (15AR) and a length in the channel width direction of a drain electrode region (16AR), WAs and WAd, are each smaller than a length in the channel width direction of the oxide semiconductor layer (14A), WAos, the length in the channel width direction of the oxide semiconductor layer (14A), WAos, is smaller than a length in the channel width direction of a gate electrode (12A), WAg, and a region in which at least one of the source electrode region (15AR) and the drain electrode region (16AR) is in contact with the oxide semiconductor layer(14A) entirely overlaps the gate electrode (12A).
    Type: Application
    Filed: November 21, 2016
    Publication date: September 24, 2020
    Inventor: Masahiro TOMIDA
  • Publication number: 20180356660
    Abstract: A plurality of TFTs provided in a peripheral circuit region of an active matrix substrate of an embodiment includes a TFT (10A) in which, when viewed in a direction perpendicular to a substrate (11A), the length in the channel width direction of an oxide semiconductor layer (14A), WAos, is smaller than the length in the channel width direction of a gate electrode (12A), WAg, the length in the channel width direction of a source electrode region (15AR) in which the source electrode (15A) is in contact with the oxide semiconductor layer (14A), WAs, is smaller than the length in the channel width direction of the oxide semiconductor layer (14A), WAos, and the drain electrode (16A) is in contact with the oxide semiconductor layer (14A) in a plurality of drain electrode regions (16AR) arranged in the channel width direction, and the overall length in the channel width direction of the plurality of drain electrode regions (16AR), WAd, is smaller than the length in the channel width direction of the oxide semiconduc
    Type: Application
    Filed: December 2, 2016
    Publication date: December 13, 2018
    Inventors: Masahiro TOMIDA, Akihiro ODA
  • Patent number: 10074328
    Abstract: An active matrix substrate includes a display region in which a plurality of pixels are provided and a frame region lying outside the display region. The frame region includes a plurality of peripheral circuit TFTs which are supported by a substrate and which are constituents of a driving circuit. Each of the plurality of peripheral circuit TFTs includes a gate electrode, an oxide semiconductor layer arranged so as to at least partially extend over the gate electrode but to be insulated from the gate electrode, and source and drain electrodes connected with the oxide semiconductor layer.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: September 11, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Tomida, Naoki Ueda
  • Patent number: 9966040
    Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: May 8, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru Yamamoto, Yasuyuki Ogawa, Akihiro Oda, Masahiro Tomida
  • Patent number: 9905311
    Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 27, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yasuyuki Ogawa, Kaoru Yamamoto, Akihiro Oda, Masahiro Tomida
  • Patent number: 9741308
    Abstract: An active matrix substrate (100) includes a display region (R1) in which a plurality of pixels are provided and a frame region (R2) provided around the display region, the frame region including a plurality of peripheral circuit TFTs (5) which are constituents of a driving circuit, wherein each of the plurality of peripheral circuit TFTs includes a gate electrode (12), a source electrode (16), a drain electrode (18), and an oxide semiconductor layer (14), and in at least some of the plurality of peripheral circuit TFTs, a source connecting region (Rs) that is a connecting region between the oxide semiconductor layer and the source electrode and a drain connecting region (Rd) that is a connecting region between the oxide semiconductor layer and the drain electrode are asymmetrically provided.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: August 22, 2017
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Tomida, Naoki Ueda
  • Publication number: 20170213511
    Abstract: An active matrix substrate includes a display region in which a plurality of pixels are provided and a frame region lying outside the display region. The frame region includes a plurality of peripheral circuit TFTs which are supported by a substrate and which are constituents of a driving circuit. Each of the plurality of peripheral circuit TFTs includes a gate electrode, an oxide semiconductor layer arranged so as to at least partially extend over the gate electrode but to be insulated from the gate electrode, and source and drain electrodes connected with the oxide semiconductor layer.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 27, 2017
    Inventors: MASAHIRO TOMIDA, NAOKI UEDA
  • Publication number: 20160358567
    Abstract: An active matrix substrate (100) includes a display region (R1) in which a plurality of pixels are provided and a frame region (R2) provided around the display region, the frame region including a plurality of peripheral circuit TFTs (5) which are constituents of a driving circuit, wherein each of the plurality of peripheral circuit TFTs includes a gate electrode (12), a source electrode (16), a drain electrode (18), and an oxide semiconductor layer (14), and in at least some of the plurality of peripheral circuit TFTs, a source connecting region (Rs) that is a connecting region between the oxide semiconductor layer and the source electrode and a drain connecting region (Rd) that is a connecting region between the oxide semiconductor layer and the drain electrode are asymmetrically provided.
    Type: Application
    Filed: February 10, 2015
    Publication date: December 8, 2016
    Inventors: Masahiro TOMIDA, Naoki UEDA
  • Publication number: 20160063955
    Abstract: A display device includes: a display unit, a driver unit, and a control unit. The display unit includes a plurality of pixel units arranged in a matrix. The driver unit includes an output transistor configured to drive a plurality of scanning lines connected to the plurality of pixel units. The control unit is configured to supply to the driver unit in a display period, a signal for displaying an image on the display unit, and control a bias state of the output transistor in a display suspension period, so that an absolute value of a threshold voltage of the output transistor which is increased in the display period decreases.
    Type: Application
    Filed: February 25, 2014
    Publication date: March 3, 2016
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kaoru YAMAMOTO, Yasuyuki OGAWA, Akihiro ODA, Masahiro TOMIDA
  • Publication number: 20160042806
    Abstract: A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.
    Type: Application
    Filed: February 12, 2014
    Publication date: February 11, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yasuyuki OGAWA, Kaoru YAMAMOTO, Akihiro ODA, Masahiro TOMIDA
  • Patent number: 8614474
    Abstract: The area C1 of the channel region of the drive TFT and the area C2 of the channel region of the memory TFT are set to have a relationship C1<C2 to an extent that allows predetermined hysteresis natures dependent on respective functions thereof.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 24, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masahiro Tomida
  • Patent number: 8572956
    Abstract: A hydraulic supply device of an automatic transmission, which supplies operating oil to the automatic transmission that is able to shift power from an engine and transmit the power to drive wheels of a vehicle by selectively engaging a plurality of frictional engagement devices using hydraulic pressure is disclosed.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: November 5, 2013
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Tomohiro Miyabe, Masanobu Kimura, Ryoichi Hibino, Shinobu Nakamura, Masahiro Tomida
  • Patent number: 8567579
    Abstract: A clutch apparatus includes an input shaft having a bore portion extending in an axial direction thereof, a stator shaft formed in a cylindrical shape and provided so as to surround an outer circumferential surface of the input shaft, and a sleeve formed in a cylindrical shape and provided so as to surround an outer circumferential surface of the stator shaft, wherein the stator shaft includes an internal hydraulic passage, a clearance formed between an inner circumferential surface of the sleeve and the outer circumferential surface of the stator shaft serves as a first hydraulic passage, the internal hydraulic passage serves as a second hydraulic passage, a clearance formed between an inner circumferential surface of the stator shaft and the outer circumferential surface of the input shaft serves as a third hydraulic passage, and the bore portion of the input shaft serves as a fourth hydraulic passage.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: October 29, 2013
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Shinobu Nakamura, Masahiro Tomida
  • Publication number: 20130264568
    Abstract: A purpose of the present invention is to provide: a semiconductor device where light-induced deterioration of characteristics of oxide semiconductor TFT is prevented without lowering the aperture ratio of pixels; a display device including such a semiconductor device; a color filter substrate; and a method for manufacturing such a semiconductor device. A semiconductor device (100A) of the present invention includes: a substrate (2); a thin film transistor (10) formed on the substrate (2); a light-absorbing film (15) that is formed on the thin film transistor (10) and that absorbs light having wavelengths of less than 450 nm; and a pixel electrode (17) connected to the thin film transistor (10). The thin film transistor (10) includes an oxide semiconductor layer (8). The light-absorbing film (15) is formed of an oxide containing In, Ga, or Zn. The light-absorbing film (15) is formed to overlap the thin film transistor (10) when viewed from normal direction to the semiconductor device (100A).
    Type: Application
    Filed: December 19, 2011
    Publication date: October 10, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Tomida, Atsuyuki Hoshino
  • Publication number: 20130105794
    Abstract: The area C1 of the channel region of the drive TFT and the area C2 of the channel region of the memory TFT are set to have a relationship C1<C2 to an extent that allows predetermined hysteresis natures dependent on respective functions thereof.
    Type: Application
    Filed: May 11, 2011
    Publication date: May 2, 2013
    Inventor: Masahiro Tomida
  • Publication number: 20110139562
    Abstract: A clutch apparatus includes an input shaft having a bore portion extending in an axial direction thereof, a stator shaft formed in a cylindrical shape and provided so as to surround an outer circumferential surface of the input shaft, and a sleeve formed in a cylindrical shape and provided so as to surround an outer circumferential surface of the stator shaft, wherein the stator shaft includes an internal hydraulic passage, a clearance formed between an inner circumferential surface of the sleeve and the outer circumferential surface of the stator shaft serves as a first hydraulic passage, the internal hydraulic passage serves as a second hydraulic passage, a clearance formed between an inner circumferential surface of the stator shaft and the outer circumferential surface of the input shaft serves as a third hydraulic passage, and the bore portion of the input shaft serves as a fourth hydraulic passage.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 16, 2011
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Shinobu Nakamura, Masahiro Tomida
  • Publication number: 20110095584
    Abstract: An object of the present invention is to provide a seat apparatus enabling noise reduction and size reduction of a rotation transmitting mechanism. This seat apparatus is provided with a rotation transmitting mechanism capable of transmitting rotation to each of adjusting mechanisms. This rotation transmitting mechanism includes a motor, a worm, and two worm wheels each meshed with the worm and arranged in proximity to each other. This rotation transmitting mechanism also includes four clutch members. Each clutch member is interposed between corresponding one of the adjusting mechanisms and corresponding one of the worm wheels. Each clutch member is configured such that it can be switched between a transmission state and an interruption state. In the transmission state, rotation via the worm wheel can be transmitted to the corresponding adjusting mechanism. In the interruption state, on the other hand, transmission of the rotation is interrupted.
    Type: Application
    Filed: October 27, 2010
    Publication date: April 28, 2011
    Applicant: IMASEN ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Masahiro TOMIDA, Kiyoyuki KOJIMA, Hiroyuki UEKI
  • Publication number: 20100311538
    Abstract: A hydraulic pressure supply device of an automatic transmission which supplies working oil to the automatic transmission capable of utilizing the oil pressure to make any of a plurality of frictional engagement devices selectively engaged, thereby performing gear shift to transmit the power from an engine to driving wheels of a vehicle is disclosed.
    Type: Application
    Filed: March 18, 2010
    Publication date: December 9, 2010
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Tomohiro MIYABE, Ryoichi HIBINO, Shinobu NAKAMURA, Masahiro TOMIDA
  • Publication number: 20100236231
    Abstract: A hydraulic supply device of an automatic transmission, which supplies operating oil to the automatic transmission that is able to shift power from an engine and transmit the power to drive wheels of a vehicle by selectively engaging a plurality of frictional engagement devices using hydraulic pressure is disclosed.
    Type: Application
    Filed: March 18, 2010
    Publication date: September 23, 2010
    Applicant: AISIN SEIKI KABUSHIKI KAISHA
    Inventors: Tomohiro Miyabe, Masanobu Kimura, Ryoichi Hibino, Shinobu Nakamura, Masahiro Tomida