Patents by Inventor Masahiro Wada

Masahiro Wada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7893542
    Abstract: The invention provides a connecting structure for a flip-chip semiconductor package in which cracking and delamination are inhibited or reduced to improve reliability, and in which the potential range of designs is expanded for the inner circuitry of circuit boards and the inductance is reduced. The invention is a connecting structure for a flip-chip semiconductor package, including: a circuit board having a core layer and at least one build-up layer; a semiconductor element connected via metal bumps to the circuit board; and a sealing resin composition with which gaps between the semiconductor element and circuit board are filled, wherein a cured product of the sealing resin composition has a glass transition temperature between 60° C. and 150° C. and a coefficient of linear expansion from room temperature to the glass transition temperature being between 15 ppm/° C. and 35 ppm/° C., a cured product of the build-up layer has a the glass transition temperature of at least 170° C.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: February 22, 2011
    Assignee: Sumitomo Bakelite Company, Ltd.
    Inventors: Kenya Tachibana, Masahiro Wada, Takuya Hatao
  • Publication number: 20110026329
    Abstract: A semiconductor device including a plurality of capacitance units connected in parallel between a first voltage and a second voltage. Each of the plurality of capacitance units includes: a capacitance element connected with the first voltage; and a capacitance disconnecting circuit connected between the second voltage and the capacitance element. The capacitance disconnecting circuit includes a non-volatile memory cell with a threshold voltage changed based on a change of a leakage current which flows from the capacitance element, and blocks off the leakage current based on a rise of the threshold voltage of the non-volatile memory cell when the leakage current exceeds a predetermined value.
    Type: Application
    Filed: July 29, 2010
    Publication date: February 3, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Masahiro WADA
  • Patent number: 7876907
    Abstract: Characteristic amounts in each small region of audio signals transmitted in the working system and the standby system are extracted by characteristic amount calculators 6-1, 6-2. A characteristic amount comparator 7 compares the characteristic amounts and judges occurrence of fault of a fault. Characteristic amount difference calculators 9-1, 9-2, ?D? comparator 10, and faulty system judging unit 11 judges the system having a fault. Majority decision processor 12 and significance judging unit 13 enhance the reliability of the judgement. Delay difference of audio signals between systems is roughly detected by sub-sampling audio signals of two systems and comparing them, and then accurately detected without sub-sampling. Delay difference between audio signals is adjusted by the detected delay difference.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: January 25, 2011
    Assignee: KDDI Corporation
    Inventors: Ryoichi Kawada, Atsushi Koike, Masahiro Wada, Shuichi Matsumoto
  • Publication number: 20100308261
    Abstract: A system (100) of the present invention for producing an iodine compound includes: a raw material adjusting unit (1) for supplying hydrogen-containing gas to at least one of liquid iodine in an iodine melting pot (4) and gaseous iodine obtained by evaporating liquid iodine so as to obtain a mixture gas; a hydrogen iodide producing unit (10) including a hydrogen iodide producing tower (12) having a catalyst layer (12a) for converting the introduced mixture gas into crude hydrogen iodide gas; a hydrogen iodide refining unit for removing unreacted iodine from the introduced crude hydrogen iodide gas so as to obtain hydrogen iodide gas; and an iodine compound producing unit (30) for producing a target iodine compound from the obtained hydrogen iodide gas and a reaction material. This allows producing an iodine compound with high purity easily, efficiently, and with low cost.
    Type: Application
    Filed: January 29, 2009
    Publication date: December 9, 2010
    Applicant: Nippoh Chemicals Co., Ltd
    Inventors: Satoshi Kanbe, Kazumi Hosono, Masahiro Wada
  • Publication number: 20100303708
    Abstract: According to a method for producing an inorganic iodide in accordance with the present invention, it is possible to efficiently produce a highly pure inorganic iodide by reacting a hydrogen iodide gas with an inorganic base compound by bringing the hydrogen iodide gas into contact with the inorganic base compound. As such, it is possible to provide a simple and efficient method for producing an inorganic iodide.
    Type: Application
    Filed: January 29, 2009
    Publication date: December 2, 2010
    Applicant: Nippoh Chemicals Co., Ltd.
    Inventors: Satoshi Kanbe, Kazumi Hosono, Masahiro Wada
  • Patent number: 7838172
    Abstract: A composite porous body, a gas diffusion layer member of a polymer electrolyte fuel cell, a cell member for the polymer electrolyte fuel cell, and manufacturing methods thereof are provided. The composite porous body is a metallic composite porous body in which a sheet-like metal portion composed of a composite porous body having a three-dimensional mesh structure and a resin portion extending in an in-plane direction of the metal portion are integrally formed with each other. The gas diffusion layer member of a polymer electrolyte fuel cell is composed of a composite porous body in which a sheet-like metal portion composed of a composite porous body having a three-dimensional mesh structure and a resin portion extending in an in-plane direction of the metal portion are integrally formed with each other. Also, the gas diffusion layer member of a polymer electrolyte fuel cell has a separator plate, and the conductive porous body placed on at least one surface of the separator plate.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: November 23, 2010
    Assignee: Mitsubishi Materials Corporation
    Inventors: Masahiro Wada, Eiko Kanda, Takeshi Isobe, Komei Kato, Takumi Shibuya, Sakae Akiyama, Kazuichi Hamada
  • Publication number: 20100289167
    Abstract: An apparatus for producing a porous body that forms an expandable slurry containing at least inorganic powder, a foaming agent, and a binder into a sheet, causes the expandable slurry sheet to be foamed and baked, and thereby produces the porous body, the apparatus includes: a mixer preparing the expandable slurry by containing inorganic powder, a foaming agent, and a binder; a die-coater that has a discharge opening which discharges the expandable slurry provided from the mixer to an external thereof so as to shape the expandable slurry into a sheet; and a carrier sheet arranged so as to face the discharge opening of the die-coater with a gap interposed therebetween, and feeding the expandable slurry discharged from the discharge opening, wherein a flow path of the expandable slurry from inside the mixer to the discharge opening of the die-coater is hermetically sealed from an outside.
    Type: Application
    Filed: October 23, 2007
    Publication date: November 18, 2010
    Applicant: Mitsubishi Materials Corporation
    Inventors: Tetsuji Tsujimoto, Takumi Shibuya, Hiroki Ueno, Sakae Akiyama, Masahiro Wada
  • Patent number: 7808054
    Abstract: An OTP memory cell according to the present invention includes: a semiconductor substrate including a lower electrode forming region having a lower electrode formed therein, a diffusion layer forming region having a source and a drain formed therein, a first trench-type insulating region, and a second trench-type insulating region; an upper electrode being in contact with the first trench-type insulating region and formed on the lower electrode with the first insulating film interposed therebetween; and a gate electrode being in contact with the second trench-type insulating region and formed on a channel region with the second insulating film interposed therebetween, in which a shape of at least a part of an end of the lower electrode forming region in contact with the first insulating film is sharper than a shape of an end of the channel region in contact with the second insulating film.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: October 5, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Masahiro Wada
  • Patent number: 7794853
    Abstract: Porous titanium having a low contact resistance includes porous titanium body, Au, and Ti oxide layer (3). Porous titanium includes continuous holes (1) opening on a surface and being connected to inner holes and a skeleton (2). Au adheres to at least an outer skeletal surface (4) of the porous titanium via diffusion bonding to form a network structure. The Ti oxide layer (3) is formed in a clearance between adjacent Au cords (5) of the Au network sticking. The width of an Au cord (5) of the Au network is 0.3 to 10 ?m at least at one position; and the thickness of the Ti oxide layer (3), which is formed in the clearance between adjacent Au cords (5) of the Au network is 30 to 150 nm.
    Type: Grant
    Filed: December 13, 2007
    Date of Patent: September 14, 2010
    Assignee: Mitsubishi Materials Corporation
    Inventors: Kenji Orito, Toshiharu Hayashi, Masahiro Wada, Reiko Izumi, Koji Hoshino
  • Patent number: 7773674
    Abstract: A matching section performs motion estimation upon a predetermined processing unit of input video (p) by, e.g., an iterative gradient method. A motion vector (v) obtained by the iterative gradient method is obtained by the expression v=?·?v+v0 (wherein v0 indicates an initial displacement motion vector and ?v indicates a differential vector). A characteristic amount extraction section extracts a characteristic amount from the distribution of motion vectors obtained by the motion estimation. A parameter determination section determines a conversion parameter ? applied to the next processing unit by the characteristic amount. If the characteristic amount is equal to or larger than a predetermined threshold, the conversion parameter ? is determined to be larger (e.g., ?=1). If the characteristic amount is smaller than the threshold, the conversion parameter ? is determined to be smaller (e.g., ?=0.1).
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: August 10, 2010
    Assignee: KDDI Corporation
    Inventors: Ryoichi Kawada, Osamu Sugimoto, Masahiro Wada, Atsushi Koike
  • Patent number: 7771506
    Abstract: A spongy sintered article of titanium or titanium alloy having a three-dimensional network structure in which continuous pores opening to a surface and continuing with internal pores are formed, and having a porosity of 50 to 98%, the spongy sintered article having a composition consisting of 0.1 to 0.6% by mass of carbon and a remainder containing titanium and inevitable impurities, the inevitable impurities having an oxygen content limited to not more than 0.6% by mass, and the spongy sintered article exhibiting an excellent compression strength.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: August 10, 2010
    Assignee: Mitsubishi Materials Corporation
    Inventors: Masahiro Wada, Takumi Shibuya
  • Publication number: 20100190017
    Abstract: A gypsum board having mold resistance includes a gypsum core containing a first anti-mold agent poorly soluble in water and a waterproofing agent; and gypsum board paper containing a second anti-mold agent poorly soluble in water.
    Type: Application
    Filed: May 27, 2008
    Publication date: July 29, 2010
    Applicant: YOSHINO GYPSUM CO., LTD
    Inventors: Masahiro Wada, Tomoya Hasegawa, Shizuo Taira, Tsuneo Tsuruzawa
  • Patent number: 7757092
    Abstract: A request signal requesting a response signal from an ID card is transmitted, and, when a response signal is received, it is compared with the data identifying the manager, which is stored in advance, and a determination is made as to whether or not the data identifying the manager is received. If the data is determined to be received, a timer is set, and, if there is a job being held up, the output processing of the job is executed. When it is determined that a predetermined time has elapsed, outputting is notified to be restricted, thereafter outputting is prohibited.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: July 13, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masahiro Wada
  • Patent number: 7738664
    Abstract: Characteristic amounts in each small region of audio signals transmitted in the working system and the standby system are extracted by characteristic amount calculators 6-1, 6-2. A characteristic amount comparator 7 compares the characteristic amounts and judges occurrence of a fault. Characteristic amount difference calculators 9-1, 9-2, ?D? comparator 10, and faulty system judging unit 11 judges the system having a fault. Majority decision processor 12 and significance judging unit 13 enhance the reliability of the judgment. Delay difference of audio signals between systems is roughly detected by sub-sampling audio signals of two systems and comparing them, and then accurately detected without sub-sampling. Delay difference between audio signals is adjusted by the detected delay difference.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: June 15, 2010
    Assignee: KDDI Corporation
    Inventors: Ryoichi Kawada, Atsushi Koike, Masahiro Wada, Shuichi Matsumoto
  • Patent number: 7661511
    Abstract: Perforations of a board for building material are formed by a number of recesses (13), or a number of recesses (13) and through-holes (12). A bottom face (16) of the recess forms a face for screwing or driving the fixing element (70) thereto. A color of the bottom face is set to have a brightness of color decreased in comparison with a color of a surface (18) of the board. A substrate of the board is a gypsum board and the bottom face of the recess is formed by a liner paper for gypsum board. According to such a board, a region for screwing or driving the fixing element thereto can be ensured without impairing regularity, uniformity or architectural design of the perforations, and putty finishing or the like for an exposed part of the fixing element can be omitted.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: February 16, 2010
    Assignee: Yoshino Gypsum Co., Ltd.
    Inventors: Tomoya Hasegawa, Yasuyuki Amagai, Shoichi Okazaki, Masahiro Wada
  • Publication number: 20100032826
    Abstract: A flip-chip semiconductor package includes a circuit board having a core layer and at least one buildup layer, a semiconductor device connected to the circuit board through a metal bump, and a cured member that is made of a sealing resin composition and enclosed between the semiconductor device and the circuit board. The coefficient of linear expansion at 25 to 75° C. of the cured member is 15 to 35 ppm/° C., the glass transition temperature of at least one buildup layer is 170° C. or more, and the coefficient of linear expansion of at 25 to 75° C. of the at least one buildup layer in the planar direction is 25 ppm or less. A highly reliable flip-chip semiconductor package, buildup layer material, core layer material, and sealing resin composition can be provided by preventing cracks and inhibiting delamination.
    Type: Application
    Filed: December 5, 2007
    Publication date: February 11, 2010
    Applicant: SUMITOMO BAKELITE COMPANY LIMITED
    Inventors: Kenya Tachibana, Masahiro Wada, Hitoshi Kawaguchi, Kensuke Nakamura
  • Publication number: 20100032616
    Abstract: A mixed material having a high expansion rate for producing a porous metallic sintered body including: a conventional mixed material for producing a porous metallic sintered body which is formed of a mixture including a composition of 0.05 to 10% by mass of a non-water-soluble hydrocarbon-based organic solvent having 5 to 8 carbon atoms, 0.5 to 20% by mass of a water-soluble resin binder, and 5 to 80% by mass of a metal powder having an average particle size within a range of 0.5 to 500 ?m, and water as the balance; and a gas, wherein the mixed material contains the gas so that the proportion of the gas is within a range of 2 to 50% by volume while the remainder is the conventional mixed material for producing a porous metallic sintered body.
    Type: Application
    Filed: October 23, 2007
    Publication date: February 11, 2010
    Applicant: Mitsubishi Materials Corporation
    Inventors: Masahiro Wada, Eiko Kanda, Shinichi Ohmori, Takumi Shibuya, Tetsuji Tsujimoto
  • Publication number: 20100015507
    Abstract: Porous titanium having a low contact resistance includes porous titanium body, Au, and a Ti oxide layer (3). Porous titanium includes continuous holes (1) opening on a surface and being connected to inner holes and a skeleton (2). Au adheres to at least an outer skeletal surface (4) of the porous titanium via diffusion bonding to form a network structure. The Ti oxide layer (3) is formed in a clearance between adjacent Au codes (5) of the Au network sticking. The width of an Au code (5) of the Au network is 0.3 to 10 ?m at least at one position; and the thickness of the Ti oxide layer (3), which is formed in the clearance between adjacent Au codes (5) of the Au network is 30 to 150 nm.
    Type: Application
    Filed: December 13, 2007
    Publication date: January 21, 2010
    Applicant: MITSUBISHI MATERIALS CORPORATION
    Inventors: Kenji Orito, Toshiharu Hayashi, Masahiro Wada, Reiko Izumi, Koji Hoshino
  • Publication number: 20090321919
    Abstract: The semiconductor device 1 includes a substrate 3, a semiconductor chip 4 mounted on the substrate 3, the substrate 3, a bump 5 connecting the substrate 3 and the semiconductor chip 4, and an underfill 6 filling in around the bump 5. In the case of a bump 5 composed of a high-melting-point solder having a melting point of 230° C. or more, the underfill 6 is composed of a resin material having an elastic modulus in the range of 30 MPa to 3000 MPa. In the case of a bump 5 composed of a lead-free solder, the underfill 6 is composed of a resin material having an elastic modulus in the range of 150 MPa to 800 MPa. An insulating layer 311 of buildup layers 31 of the substrate 3 has a linear expansion coefficient of 35 ppm/° C. or less in the in-plane direction of the substrate at temperatures in the range of 25° C. to the glass transition temperature.
    Type: Application
    Filed: April 20, 2007
    Publication date: December 31, 2009
    Inventors: Mitsuo Sugino, Takeshi Hosomi, Masahiro Wada, Masataka Arai
  • Publication number: 20090273073
    Abstract: The invention provides a connecting structure for a flip-chip semiconductor package in which cracking and delamination are inhibited or reduced to improve reliability, and in which the potential range of designs is expanded for the inner circuitry of circuit boards and the inductance is reduced. The invention is a connecting structure for a flip-chip semiconductor package, including: a circuit board having a core layer and at least one build-up layer; a semiconductor element connected via metal bumps to the circuit board; and a sealing resin composition with which gaps between the semiconductor element and circuit board are filled, wherein a cured product of the sealing resin composition has a glass transition temperature between 60° C. and 150° C. and a coefficient of linear expansion from room temperature to the glass transition temperature being between 15 ppm/° C. and 35 ppm/° C., a cured product of the build-up layer has a the glass transition temperature of at least 170° C.
    Type: Application
    Filed: March 28, 2008
    Publication date: November 5, 2009
    Inventors: Kenya Tachibana, Masahiro Wada, Takuya Hatao