Patents by Inventor Masahiro Yokomichi

Masahiro Yokomichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11778813
    Abstract: Semiconductor devices including active regions and gate electrodes are disclosed. An example semiconductor device according to the disclosure includes a gate electrode extending in a first direction, and first and second active regions extending in a second direction. The gate electrode has a side extending in the first direction. The first active region includes: a first center portion having a first width in the first direction; and a first end portion disposed at a first end of the first center portion, and having a second width in the first direction that is greater than the first width. The second active region includes: a second center portion having a third width in the first direction. The gate electrode overlaps along the side with portions of the first end portion and the second center portion.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: October 3, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Masahiro Yokomichi
  • Publication number: 20230103779
    Abstract: A tactile sensor, including: a contact part (1), configured to receive pressure transmitted when a manipulator grabs a target object, and transmit the pressure to a sensing part (2); the sensing part (2), located on one side of the contact part, the sensing part (2) moving in a direction away from the contact part (1) under an action of the pressure; and a detection part (4), located on a side of the sensing part (2) away from the contact part (1), the detection part (4) sensing a position change of the sensing part (2) to generate a sensing signal, wherein the sensing signal is configured to determine a contact parameter between the manipulator and the target object.
    Type: Application
    Filed: May 31, 2021
    Publication date: April 6, 2023
    Inventors: Wuchang QI, Masahiro YOKOMICHI
  • Patent number: 11450375
    Abstract: In some examples, a subword driver block of a memory device includes a plurality of active regions of a first type and a plurality of active regions of a second type adjacent to the plurality of active regions of the first type. The subword driver block further includes a plurality of first gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of first transistors, and a plurality of second gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of second transistors. Each of the second transistors is shared by a first subword driver and a second subword driver. Each of the second transistors may include a drain and a source respectively coupled to a first and second word line, which are driven by the first subword driver and the second subword driver, respectively.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: September 20, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Takefumi Shirako, Masahiro Yokomichi, Kyuseok Lee, Sangmin Hwang
  • Publication number: 20220254788
    Abstract: Semiconductor devices including active regions and gate electrodes are disclosed. An example semiconductor device according to the disclosure includes a gate electrode extending in a first direction, and first and second active regions extending in a second direction. The gate electrode has a side extending in the first direction. The first active region includes: a first center portion having a first width in the first direction; and a first end portion disposed at a first end of the first center portion, and having a second width in the first direction that is greater than the first width. The second active region includes: a second center portion having a third width in the first direction. The gate electrode overlaps along the side with portions of the first end portion and the second center portion.
    Type: Application
    Filed: February 9, 2021
    Publication date: August 11, 2022
    Applicant: Micron Technology, Inc.
    Inventor: Masahiro Yokomichi
  • Publication number: 20220068351
    Abstract: In some examples, a subword driver block of a memory device includes a plurality of active regions of a first type and a plurality of active regions of a second type adjacent to the plurality of active regions of the first type. The subword driver block further includes a plurality of first gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of first transistors, and a plurality of second gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of second transistors. Each of the second transistors is shared by a first subword driver and a second subword driver. Each of the second transistors may include a drain and a source respectively coupled to a first and second word line, which are driven by the first subword driver and the second subword driver, respectively.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Takefumi Shirako, Masahiro Yokomichi, Kyuseok Lee, Sangmin Hwang
  • Patent number: 10944002
    Abstract: Some embodiments include an integrated assembly with a semiconductor base having a horizontally-extending upper surface, and having a recessed region. A transistor gate is supported by the semiconductor base. The transistor gate has a first segment over the horizontally-extending upper surface, and has a second segment over the recessed region. The first segment has a first vertically-extending surface along an outer edge. The second segment has a ledge along an edge of the recessed region. The ledge has an upper surface which is lower than the horizontally-extending upper surface. The second segment has a second vertically-extending surface extending upwardly from an inner portion of the ledge. A first spacer is along the first vertically-extending surface. A second spacer is along the second vertically-extending surface. The second spacer has a bottom edge beneath the horizontally-extending upper surface of the base.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: March 9, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Masahiro Yokomichi
  • Publication number: 20200083371
    Abstract: Some embodiments include an integrated assembly with a semiconductor base having a horizontally-extending upper surface, and having a recessed region. A transistor gate is supported by the semiconductor base. The transistor gate has a first segment over the horizontally-extending upper surface, and has a second segment over the recessed region. The first segment has a first vertically-extending surface along an outer edge. The second segment has a ledge along an edge of the recessed region. The ledge has an upper surface which is lower than the horizontally-extending upper surface. The second segment has a second vertically-extending surface extending upwardly from an inner portion of the ledge. A first spacer is along the first vertically-extending surface. A second spacer is along the second vertically-extending surface. The second spacer has a bottom edge beneath the horizontally-extending upper surface of the base.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 12, 2020
    Applicant: Micron Technology, Inc.
    Inventor: Masahiro Yokomichi
  • Patent number: 9240426
    Abstract: A photoelectric conversion device in which a parasitic capacitance between an optical signal common output line for commonly transmitting an optical signal and a control signal line and a parasitic capacitance between an initial voltage common output line for commonly transmitting an initial voltage and the control signal line in a plurality of photoelectric conversion units are substantially equal is provided. The control signal line is arranged so that the length of the wiring part of the control signal line in parallel with the optical signal common output line and the length of the wiring part of the control signal line in parallel with the initial voltage common output line are substantially equal and the distance between the control signal line and the optical signal common output line and the distance between the control signal line and the initial voltage common output line are substantially equal.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: January 19, 2016
    Assignee: SEIKO INSTRUMENTS INC.
    Inventor: Masahiro Yokomichi
  • Publication number: 20150371895
    Abstract: In one embodiment, a first insulating film is formed with a recess portion left therein in a contact hole, and the contact hole is surrounded by a first line pattern and a second line pattern, the first line pattern and the second line pattern having different heights. The recess portion is filled so as to form a first mask film, and the first insulating film except for the recess portion is etched back so as to be removed, thereby forming a second contact hole. After that, a conductive material is implanted in the second contact hole, and the top surface of the first line pattern having a low height is exposed, thereby forming a contact plug.
    Type: Application
    Filed: February 6, 2014
    Publication date: December 24, 2015
    Inventor: Masahiro Yokomichi
  • Publication number: 20150255465
    Abstract: This method for manufacturing a semiconductor device comprises: a step for forming a first groove (51) that extends in a prescribed direction in a first insulating layer (25) on a semiconductor substrate (1); a step for forming an electrically conductive embedded layer (127) in the first groove; a step for forming a first and second plug (27b, 27c) by dividing the embedded layer in a prescribed direction; a step for forming a first conductive film (55), having lower resistance than the embedded layer, on the exposed side surfaces of the first and second plugs; a step for embedding a second insulating layer (29) in a second groove that is located between the first conductive films of the first and second plugs; and a step for forming a second conductive film (37), having lower resistance than the embedded layer, on the exposed top surfaces of the first and second plugs.
    Type: Application
    Filed: October 11, 2013
    Publication date: September 10, 2015
    Inventor: Masahiro YOKOMICHI
  • Publication number: 20140027621
    Abstract: A photoelectric conversion device in which a parasitic capacitance between an optical signal common output line for commonly transmitting an optical signal and a control signal line and a parasitic capacitance between an initial voltage common output line for commonly transmitting an initial voltage and the control signal line in a plurality of photoelectric conversion units are substantially equal is provided. The control signal line is arranged so that the length of the wiring part of the control signal line in parallel with the optical signal common output line and the length of the wiring part of the control signal line in parallel with the initial voltage common output line are substantially equal and the distance between the control signal line and the optical signal common output line and the distance between the control signal line and the initial voltage common output line are substantially equal.
    Type: Application
    Filed: July 25, 2013
    Publication date: January 30, 2014
    Applicant: Seiko Instruments Inc.
    Inventor: Masahiro YOKOMICHI
  • Patent number: 8058599
    Abstract: A photoelectric converter has light receiving elements, amplifier circuits connected to respective outputs of the light receiving elements, reset circuits connected to respective outputs of some of the light receiving elements, and connection circuits connected between respective outputs of adjacent ones of the light receiving elements.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: November 15, 2011
    Assignee: Seiko Instruments Inc.
    Inventors: Satoshi Machida, Masahiro Yokomichi
  • Patent number: 7983889
    Abstract: The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: July 19, 2011
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Mitiko Miura, Masahiro Yokomichi, Takahiro Kajiwara, Norio Sadachika, Masataka Miyake, Takahiro Iizuka, Masahiko Taguchi, Tatsuya Ohguro
  • Patent number: 7721169
    Abstract: A scanning circuit has path switches connected between a plurality of data flip-flop circuits of the scanning circuit for sequentially reading an output signal in synchronism with a clock. A plurality of control signal lines select the path switches to arbitrarily skip reading of the flip-flop circuits that do not require the scanning circuit and always fix a potential of the skipped data flip-flop circuit. Only the arbitrary data is read, and in the case where unnecessary data exists, reading is skipped, to thereby increase the read rate.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: May 18, 2010
    Assignee: Seiko Instruments Inco.
    Inventors: Masahiro Yokomichi, Satoshi Machida, Yoshihiro Shibuya, Yukito Kawahara, Minoru Ariyama
  • Patent number: 7692133
    Abstract: Provided is a photoelectric conversion device for outputting an output voltage according to incident light, including photoelectric conversion unit for holding an optical charge generated by the incident light, a signal processing circuit impressed with a reference voltage for outputting the output voltage according to the incident light by applying a predetermined process to an output signal of the photoelectric conversion unit, and a switch provided between a terminal externally supplied with the reference voltage, and the signal processing circuit.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: April 6, 2010
    Assignee: Seiko Instruments Inc.
    Inventors: Satoshi Machida, Masahiro Yokomichi, Daisuke Muraoka, Daisuke Okano, Mihoko Yamashita
  • Patent number: 7630104
    Abstract: Provided is an image sensor capable of outputting an image signal in accordance with a data loading position of a signal processing IC. In the image sensor that can arbitrarily select the start position of an output signal of a first photoelectric conversion element, a first input terminal of a scanning circuit of a photoelectric conversion circuit is connected to a selector circuit of a signal start position, and the selector circuit is controlled by a start signal through a start signal terminal and a delay circuit according to an external control signal.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: December 8, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Masahiro Yokomichi
  • Patent number: 7626628
    Abstract: Provided is a photoelectric conversion device, including: a plurality of photoelectric conversion blocks each including a photoelectric conversion element, photoelectric conversion element resetting means for supplying an initialization potential to the photoelectric conversion element to reset the photoelectric conversion element, and transfer means for transferring a voltage of the photoelectric conversion element, in which the photoelectric conversion element resetting means resets the photoelectric conversion element every time the voltage of the photoelectric conversion element is transferred and for a standby period, during a reading period. Therefore, it is possible to perform accurate image reading by reducing the influence of a foreign matter adhered to a light receiving surface of a photoelectric conversion device.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: December 1, 2009
    Inventors: Daisuke Muraoka, Masahiro Yokomichi
  • Publication number: 20090070084
    Abstract: The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.
    Type: Application
    Filed: May 30, 2008
    Publication date: March 12, 2009
    Inventors: Mitiko Miura, Masahiro Yokomichi, Takahiro Kajiwara, Norio Sadachika, Masataka Miyake, Takahiro Iizuka, Masahiko Taguchi, Tatsuya Ohguro
  • Patent number: 7501609
    Abstract: An image sensor has image sensor ICs mounted linearly thereon. Each of the image sensor ICs comprises a light receiving device circuit array having light receiving devices, a reset circuit device array, and a plurality of switches. The light receiving devices have output terminals that output output signals in accordance with an amount of light received. The reset circuit device array initializes the output terminals of the light receiving devices in an initialization mode. The switches drive the reset circuit device array and are configured to be maintained in a conductive state during an accumulation period so that an initialization potential is outputted by the output terminal of each of the light receiving devices of one of only a first one of the linear image sensor ICs, only a last one of the linear image sensor ICs, and all of the linear image sensor ICs.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: March 10, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Masahiro Yokomichi
  • Patent number: 7485839
    Abstract: The present invention provides an image sensor capable of making waveforms of image signals, which are outputs from photoelectric converting elements, flat, and capable of acquiring image information in high precision. The image sensor includes: a plurality of photoelectric converting elements; a plurality of selecting switches provided in correspondence with the photoelectric converting elements; a scanning circuit for ON/OFF-controlling the selecting switches; a differential amplifier for amplifying a difference voltage between an electric signal entered from the photoelectric converting elements and a reference voltage; and a resistor electrically connected to two input terminals of the differential amplifier.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: February 3, 2009
    Assignee: Seiko Instruments Inc.
    Inventor: Masahiro Yokomichi