Patents by Inventor Masakatsu Gotou

Masakatsu Gotou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6951774
    Abstract: A semiconductor device having a stack structure comprises: a single-piece substrate having a chip support surface serving as a main surface, a back surface, a plurality of connection terminals provided on the chip support surface and a plurality of solder balls provided on the back surface; a first semiconductor chip having a main surface, aback surface, a plurality of semiconductor devices on the main surface of the first semiconductor chip and a plurality of pads provided on the main surface of the first semiconductor chip; a second semiconductor chip having a main surface, a back surface, a plurality of semiconductor devices provided on the main surface of the second semiconductor chip and a plurality of pads provided on the main surface of the second semiconductor chip; and a resin sealing body formed on the chip support surface of the single-piece substrate and used for sealing the first semiconductor chip and the second semiconductor chip; and a plurality of wires for connecting the pads of the second s
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: October 4, 2005
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Shigeru Nakamura, Masakatsu Gotou
  • Patent number: 6835596
    Abstract: An improvement of the yield of semiconductor devices is achieved in the manufacture of a semiconductor device. The method includes forming a resin enclosure for block-molding a plurality of a semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate, and then injecting a resin from a first side to a second side of a main surface of the substrate. The plurality of semiconductor chips are mounted on the main surface of the substrate from the first side to the second side of the main surface with a predetermined spacing, the second side facing the first side. The method is characterized by the application of cleaning treatment to the main surface of the substrate before forming the resin enclosure.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: December 28, 2004
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventors: Masakatsu Gotou, Norihiko Kasai
  • Publication number: 20020151103
    Abstract: A semiconductor device having a stack structure comprises: a single-piece substrate having a chip support surface serving as a main surface, a back surface, a plurality of connection terminals provided on the chip support surface and a plurality of solder balls provided on the back surface; a first semiconductor chip having a main surface, aback surface, a plurality of semiconductor devices on the main surface of the first semiconductor chip and a plurality of pads provided on the main surface of the first semiconductor chip; a second semiconductor chip having a main surface, a back surface, a plurality of semiconductor devices provided on the main surface of the second semiconductor chip and a plurality of pads provided on the main surface of the second semiconductor chip; and a resin sealing body formed on the chip support surface of the single-piece substrate and used for sealing the first semiconductor chip and the second semiconductor chip; and a plurality of wires for connecting the pads of the second s
    Type: Application
    Filed: March 4, 2002
    Publication date: October 17, 2002
    Inventors: Shigeru Nakamura, Masakatsu Gotou
  • Publication number: 20020038918
    Abstract: The improvement of the yields of semiconductor devices is intended. In a method for manufacturing a semiconductor device, it has forming a resin enclosure for block-molding a plurality of semiconductor chips by placing a plurality of semiconductor chips inside a cavity of a molding die along with a substrate and then injecting a resin from a first side to a second side of a main surface of the substrate, the plurality of semiconductor chips being mounted on the main surface of the substrate from the first side to the second side of the main surface with a predetermined space, the second side facing to the first side, the method further has applying cleaning treatment to the main surface of the substrate before forming the resin enclosure.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 4, 2002
    Inventors: Masakatsu Gotou, Norihiko Kasai
  • Patent number: 5849606
    Abstract: A semiconductor device has a pellet at the upper surface of a substrate and connects the pellet with a plurality of connecting terminals formed of solder bumps. The connecting terminal group is arranged in the form of a plurality of annular lines in the periphery of the pellet, and a reinforcing resin layer is formed, in the connecting terminal group, of a resin filling a thinner space formed between the pellet and the substrate. At the time of forming the solder bumps, a cutout portion (a vacant area where no bumps are arranged) is formed in the connecting terminal annular line group by means of a cutout part opened at one side of the annular line group, and the reinforcing resin layer is also formed in the cutout portion. Since the air in the thinner space is perfectly exhausted by the effect of the connecting terminal annular line group cutout portion when the vacant area is filled with the reinforcing resin, the generation of an unfilled area in the reinforcing resin layer can be prevented.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: December 15, 1998
    Assignees: Hitachi, Ltd., Hitachi Hokkai
    Inventors: Hiroshi Kikuchi, Tetsuya Hayashida, Masakatsu Gotou