Patents by Inventor Masakazu Ueno
Masakazu Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9658855Abstract: A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction.Type: GrantFiled: October 10, 2014Date of Patent: May 23, 2017Assignee: FUJITSU LIMITEDInventors: Masakazu Ueno, Masahiro Doteguchi
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Publication number: 20160103683Abstract: A compiler apparatus copies a branch instruction included in first code to produce a plurality of branch instructions. The compiler apparatus generates a control instruction to cause different threads running on a processor, which is able to execute a plurality of threads that share storage space for storing information to be used for branch prediction, to execute different ones of the plurality of branch instructions. The compiler apparatus generates second code including the plurality of branch instructions and the control instruction.Type: ApplicationFiled: October 10, 2014Publication date: April 14, 2016Applicant: FUJITSU LIMITEDInventors: Masakazu UENO, Masahiro DOTEGUCHI
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Publication number: 20090086458Abstract: In plasma displays in different inch sizes, there is a disadvantage in that because each of the plasma displays in different inch sizes has an output semiconductor device with a different outer shape, a pitch of the external lead and the number of the output semiconductor devices vary, so that printed circuit boards need be designed differently for the different inch sizes. A hybrid integrated circuit includes mounting portions which are composed of a conductive path on an insulated metal substrate, and into which at least an output semiconductor device of a discharge maintaining circuit is incorporated, and includes external terminals arranged at a constant pitch. When the inch size of the plasma display is changed, the mounting portions are designed to have a size enough to accommodate the output semiconductor device for the greatest inch size. Thus, the same hybrid integrated circuit is commonly used.Type: ApplicationFiled: September 19, 2008Publication date: April 2, 2009Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Masashi Terauchi, Yoshiaki Kurosu, Masakazu Ueno, Norio Okazaki, Kazumasa Arai
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Publication number: 20080272329Abstract: The present invention provides a piezoelectric ceramic composition, for producing piezoelectric elements exhibiting high piezoelectric strain constant d33 and high Curie temperature Tc, which composition includes a perovskite PbZrO3 (a), a perovskite PbTiO3 (b), SrO (c), Nb2O5 (d) and ZnO (e), and relative amounts of the components (a), (b), (c) (d) and (e) satisfy the general formula: Pb(ZraTi1-a)O3+bSrO+cNbO2.5+dZnO wherein 0.51?a?0.54; 1.1×10?2?b?6.0×10?2; 0.9×10?2?c?4.25×10?2; 0.1×10?2?d?1.25×10?2; and 2.9?c/d?15.0.Type: ApplicationFiled: February 22, 2006Publication date: November 6, 2008Applicants: IBIDEN CO., LTD., DAI NIPPON TORYO CO.,LTDInventors: Atsushi Ito, Yoshiya Matsuno, Haruhide Shikano, Takahiko Ido, Takuo Matsuyama, Shigeo Fukuyasu, Masakazu Ueno
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Patent number: 5450037Abstract: A gradient detecting unit detects the gradient in the output of a driven circuit. An offset voltage generating unit generates an offset voltage in response to an output of a driven circuit as well as the gradient detected by the gradient detecting unit. The gradient in the output of the driven circuit is increased as the change thereof is more abrupt and decreased as the change thereof is more gentle. For example, if the detected gradient is added to the normal offset voltage to form an offset voltage, the offset voltage can follow the changes in the output of the driven circuit to supply a proper supply voltage to the driven circuit.Type: GrantFiled: June 29, 1994Date of Patent: September 12, 1995Assignee: Sanyo Electric Co., Ltd.Inventors: Masahito Kanaya, Takeshi Suzuki, Masakazu Ueno, Takahisa Makino, Yukinao Sakuma
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Patent number: 5285107Abstract: A hybrid integrated circuit device is provided with: a microcomputer, a plurality of peripheral circuit elements, and a non-volatile memory which is positioned adjacent to the microcomputer, all of which are interconnected by a plurality of specified conductive paths; pair of integrated circuit substrates on which is formed the conductive paths and a casing provided with the pair of integrated circuit substrates secured to the upper and lower surfaces of the casing, forming a sealed space between these surfaces. The microcomputer and the peripheral circuit elements are positioned in the sealed space and only the non-volatile memory is positioned in an exposed space. The hybrid integrated circuit device of the present invention has a compact and simple form with a high degree of mounting density as well as superior handling capabilities and reliability.Type: GrantFiled: April 18, 1990Date of Patent: February 8, 1994Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Kazami, Osamu Nakamoto, Hisashi Shimizu, Katsumi Ohkawa, Yasuhiro Koike, Koji Nagahama, Masao Kaneko, Masakazu Ueno, Yasuo Saitou
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Patent number: 5159433Abstract: In a position closest to the mounting position of a microcomputer in a casing of a hybrid integrated circuit device on which is mounted the microcomputer and its peripheral circuit elements, an insertion hole is formed for a non-volatile memory which feeds data to the microcomputer. A socket for connecting the non-volatile memory is provided at the bottom of this insertion hole. Because of this configuration it is possible to connect the microcomputer and the non-volatile memory at an extremely short distance and the mounting efficiency of the integrated circuit device is increased. In addition, the non-volatile memory can detachably be mounted. Furthermore, the external shape of the insertion hole for the non-volatile memory is essentially the same as the external shape of the non-volatile memory so that when the non-volatile memory is inserted, the entire surface of this hybrid integrated circuit device is almost flat, providing excellent handling characteristics.Type: GrantFiled: April 18, 1990Date of Patent: October 27, 1992Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Kazami, Osamu Nakamoto, Hisashi Shimizu, Katsumi Ohkawa, Yasuhiro Koike, Koji Nagahama, Masao Kaneko, Masakazu Ueno, Yasuo Saitou
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Patent number: 4741333Abstract: A dust-free garment including: a garment body having garment opening portions opening to the outside; an air passage system, attached to the garment body and having an outlet adapted to communicate to a dust collector for exhausting air therein to the dust collector to filter air; and an air entrance mechanism located in the vicinity of at least one of the garment opening portions and communicated to the air passage system for entering air into the air passage system.Type: GrantFiled: January 30, 1987Date of Patent: May 3, 1988Assignee: Shimizu Construction Co., Ltd.Inventors: Yoshinobu Suzuki, Shusaku Nisiate, Kenzo Sato, Masakazu Ueno, Hiroaki Shimizu, Katsunori Fujimura
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Patent number: 4737852Abstract: An image sensor of the kind which employs a line array of a-Si photodiodes on an insulating substrate and in which the outputs of the diodes are stored in the lead capacitances until readout. To increase the size of the lead capacitance and thereby to improve the linearity of the ouput, the lead between each diode and its processing circuit is made one plate of a capacitor, of which the other plate is a metal film insulated from the lead and advantageously maintained at ground.Type: GrantFiled: May 16, 1986Date of Patent: April 12, 1988Assignee: Fuji Electric Co., Ltd.Inventors: Hitoshi Dohkoshi, Masakazu Ueno, Toshiaki Kato
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Patent number: 4709992Abstract: A liquid crystal display employs two transparent substrates between which are positioned the liquid crystal elements for excitation. One substrate includes a linear array of row control electrodes and one set of picture element electrodes and the other includes a linear array of column control electrodes and an opposite set of picture element electrodes. On each substrate, each picture element electrode is connected to a control electrode by way of a pair of single-stage diodes connected in parallel but oppositely poled.Type: GrantFiled: December 9, 1986Date of Patent: December 1, 1987Assignee: Fuji Electric Co., Ltd.Inventor: Masakazu Ueno
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Patent number: 4698494Abstract: The invention provides a contact image sensor in which a common electrode is provided so as to oppose a plurality of individual electrodes arranged on a substrate across a photoconductive semiconductor film, characterized in that each of the individual electrodes is in contact with the semiconductor film through a window provided at a predetermined position in an insulating film. The insulating film can be made of a photosensitive resin, in which case the windows are formed by light exposure and development. Preferably, the insulating film is baked at an elevated temperature to purge impurities therefrom. The invention also provides image sensors in which the common electrode layer is made of an electrically conductive resin.Type: GrantFiled: June 6, 1986Date of Patent: October 6, 1987Assignee: Fuji Electric Co., Ltd.Inventors: Toshiaki Kato, Masakazu Ueno, Masaharu Nishiura
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Patent number: 4664748Abstract: A surface roughening method, preferably for a substrate of a solar cell, comprising coating the substrate with a photoresist material having light-shielding particles mixed therein, exposing and developing the photoresist coating and then etching the substrate with a suitable etchant.Type: GrantFiled: October 17, 1985Date of Patent: May 12, 1987Assignees: Fuji Electric Company Ltd., Fuji Electric Corporate Research and Development Ltd.Inventors: Masakazu Ueno, Toshiaki Kato
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Patent number: 4656109Abstract: A color photosensitive device includes a transparent base plate and a lamination of alternate layers of transparent conductive films and photoelectric conversion layers. The photoelectric conversion layers are sensitive to light of increasing wavelength as the distance from the base plate increases. The photoelectric conversion layers comprise amorphous silicone and the transparent conductive films comprise an oxide of indium, tin, or the like.Type: GrantFiled: September 19, 1985Date of Patent: April 7, 1987Assignee: Fuji Electric Co., Ltd.Inventor: Masakazu Ueno
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Patent number: 4634883Abstract: An image sensor for use in a solid-state facsimile transmitter includes a plurality of photosensors disposed in an array, each photosensor composed of a plurality of series-connected photodiodes; a voltage source; a plurality of switches for selectively applying a reverse bias from the voltage source to the photosensor array, each photosensor in the array being successively reverse biased by a corresponding one of the switches; and an output resistor for detecting current flowing through the selected reverse biased photosensor. The photosensors and switches may each comprise a plurality of series-connected photodiodes provided on a common substrate.Type: GrantFiled: February 7, 1985Date of Patent: January 6, 1987Assignee: Fuji Electric Company Ltd.Inventors: Masaharu Nishiura, Masakazu Ueno
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Patent number: 4594261Abstract: A thin film semiconductor device and a method for manufacturing such a device containing a thin film semiconductor layer in which there is no misalignment between a semiconductor layer containing a microcrystalline phase and an adjacent layer having no such phase. A junction region is interposed between the two amorphous semiconductor layers having a microcrystalline phase content which varies gradually from the content of the amorphous semiconductor layer having no microcrystalline phase to that of the layer having a microcrystalline phase. The junction region may be formed by the use of a glow discharge decomposition technique wherein the discharge power is gradually varied.Type: GrantFiled: September 30, 1985Date of Patent: June 10, 1986Assignee: Director-General of Agency of Industrial Science and TechnologyInventors: Masakazu Ueno, Takeshige Ichimura
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Patent number: 4578696Abstract: A thin film semiconductor device and a method for manufacturing such a device containing a thin film semiconductor layer in which there is no misalignment between a semiconductor layer containing a microcrystalline phase and an adjacent layer having no such phase. A junction region is interposed between the two amorphous semiconductor layers having a microcrystalline phase content which varies gradually from the content of the amorphous semiconductor layer having no microcrystalline phase to that of the layer having a microcrystalline phase. The junction region may be formed by the use of a glow discharge decomposition technique wherein the discharge power is gradually varied.Type: GrantFiled: November 23, 1983Date of Patent: March 25, 1986Assignee: Director-General of Agency of Industrial Science and TechnologyInventors: Masakazu Ueno, Takeshige Ichimura
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Patent number: 4235992Abstract: A method for producing high purity sterol glycosides which is characterized by selecting a most suitable raw material from among raw materials, by making use of free sterols coexistent in said raw materials, as an indication for the selection; extracting a mixture of sterol glycosides from the selected raw material; turning the resulting extract into their tetracetates; thereafter separating an objective fraction alone according to a liquid chromatography; and hydrolyzing this fraction to obtain the original sterol glycosides.Type: GrantFiled: April 23, 1979Date of Patent: November 25, 1980Assignee: Nippon Shinyaku Co., Ltd.Inventors: Masakazu Ueno, Akira Sano, Kyoichi Ideguchi
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Patent number: D345963Type: GrantFiled: April 29, 1992Date of Patent: April 12, 1994Assignee: Sanyo Electric Co., Ltd.Inventors: Masahito Kanaya, Masakazu Ueno, Kenichi Kobayashi