Patents by Inventor Masaki Aoki

Masaki Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090224331
    Abstract: A semiconductor storage device includes a semiconductor substrate, a source region, a source line, and a bit line. The source region is formed in an element region formed on the semiconductor substrate. The source line is formed to overlap with the source region in planar view. The bit line is formed on a layer higher than the source line.
    Type: Application
    Filed: March 9, 2009
    Publication date: September 10, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Masaki AOKI
  • Patent number: 7583528
    Abstract: A magnetic memory device includes a first signal line (BL) and a second signal line (/BL) extended column-wise; a third signal line (WL) extended row-wise; a memory cell including a first parallelly connected set which is disposed at the intersection of the first signal line and the third signal line, including a first magnetoresistive effect element (MTJ1) and a first select transistor (Tr1) and having one end connected to the first signal line; a second parallelly connected set which is disposed at the intersection of the second signal line and the third signal line, including a second magnetoresistive effect element (MTJ2) and a second select transistor (Tr2) and having one end connected to the second signal line; and a read circuit connected to the first signal line and the second signal line, for reading information memorized in the memory cell, based on voltages of the first signal line and the second signal line.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: September 1, 2009
    Assignee: Fujitsu Limited
    Inventor: Masaki Aoki
  • Patent number: 7576487
    Abstract: A plasma display device provided with a green color phosphor which is charged entirely with a positive potential, adsorbs only limited amounts of water, carbon monoxide, carbon dioxide and hydrocarbon, and not liable to cause chemical reaction thereto. A green color phosphor layer is formed of the green phosphor comprising at least one compound selected from among materials defined by the general formulae of M1-a (Ga1-xAlx)2 O4:Mna (where “M” denotes one of Zn, Mg, Ca and Sr), (Y1-a-yGda) (Ga1-xAlx)3 (BO3)4:Tby, (Y1-a-yGda) (Ga1-xAlx)3 (BO3)4:Cey, Tby, (Y1-a-yGda) BO3:Tby and (Y1-a-yGda)3 (Ga1-xAlx)5 O12:Tby.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: August 18, 2009
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Miyamae, Masaki Aoki, Kazuhiko Sugimoto, Hiroshi Setoguchi, Junichi Hibino, Yoshinori Tanaka
  • Publication number: 20090168495
    Abstract: In the semiconductor memory device having a resistance memory element, a first transistor having a drain terminal connected to one end of the resistance memory element and a source terminal connected to a ground voltage, and a second transistor having source terminal connected to the resistance memory element, when a write voltage is applied to the resistance memory element via the second transistor to switch the resistance memory element from a low resistance state to a high resistance state, a voltage is controlled to be a value which is not less than a reset voltage and less than a set voltage by applying to a gate terminal of the second transistor a voltage which is not less than a total of the reset voltage and a threshold voltage of the second transistor and is less than a total of the set voltage and the threshold voltage.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 2, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Masaki AOKI
  • Patent number: 7548450
    Abstract: The magnetic memory device comprises: a memory cell including two magnetoresistive effect elements serially connected to each other, and a select transistor connected to a connection node between the two magnetic resistant devices, a bit line connected to the connection node of the magnetoresistive effect elements via the select transistor, and a read circuit for reading information memorized in the magnetoresistive effect elements, based on a voltage of the connection node outputted to the bit line.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: June 16, 2009
    Assignee: Fujitsu Limited
    Inventor: Masaki Aoki
  • Patent number: 7531961
    Abstract: Phosphor layers (110G, 110B, and 110R) are made of a combination of: blue and green phosphors that are positively charged on their surfaces and baked in an oxygen-nitrogen atmosphere to reduce oxygen vacancy, and that have a ?-alumina crystal structure; and a red phosphor made of an yttrium oxide compound. Uniformly forming such phosphor layers on the wall surfaces of barrier ribs (109) provides equal charge characteristics of the phosphors of respective colors, reduces oxygen vacancy in the phosphors, and inhibits adsorption of various gases in the panel production process. This can stabilize the discharge characteristics and prevent luminance degradation at driving the panel.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaki Aoki, Hiroyuki Kawamura, Kazuhiko Sugimoto, Hiroshi Setoguchi, Junichi Hibino, Yoshinori Tanaka
  • Publication number: 20090059651
    Abstract: A method of writing into a semiconductor memory device, which includes a resistance memory element 14 which memorizes a high resistance state and a low resistance state and switches between the high resistance state and the low resistance state by an application of a voltage; a transistor 12 including a drain terminal connected to one terminal of the resistance memory element 14 and a source terminal connected to a reference voltage; and a transistor 16 including a source terminal connected to the other terminal of the resistance memory element 14.
    Type: Application
    Filed: October 31, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Masaki AOKI
  • Patent number: 7489577
    Abstract: A magnetic memory device comprises a plurality of bit lines BL; memory cells MC disposed at the respective plurality of bit lines, and each including a magnetoresistive effect element MTJ whose resistance value is changed with changes of magnetization direction, and a select transistor Tr connected to the magnetoresistive effect element MTJ, the magnetoresistive effect element MC having one terminal connected to the bit line BL and the other terminal connected to a first signal line GND via the select transistor; dummy cells DC disposed at the respective plurality of bit lines BL, and each including a resistance element R of a constant resistance value, the resistance element having one terminal connected to the bit line BL and the other terminal connected to a second signal line SIGD; and a voltage sense amplifier SA connected to the plurality of bit lines BL.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: February 10, 2009
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sato, Masaki Aoki
  • Patent number: 7486010
    Abstract: In a phosphor whose host crystal is constituted of an oxide, a method of preparing the phosphor where the oxygen deficiencies in the phosphor are not many, and a plasma display device using the same are provided. After processes of weighing, mixing and filling powders of the phosphor, a process for firing in a reducing atmosphere and a process for firing in an oxidizing atmosphere after the last reducing atmosphere process are provided. In addition, a firing temperature in the oxidizing atmosphere process is not less than 600° C. and not more than 1000° C.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: February 3, 2009
    Assignee: Panasonic Corporation
    Inventors: Kazuhiko Sugimoto, Junichi Hibino, Masaki Aoki, Yoshinori Tanaka, Hiroshi Setoguchi
  • Patent number: 7476334
    Abstract: Disclosed here is a plasma display unit that employs phosphors having an amount of charge controlled close to zero, by which degradation in luminance, color temperature, and charge characteristics can be minimized. A phosphor bearing positive or negative charge is coated with a compound for controlling the amount of charge of the phosphor through a strong chemical bonding, whereby the amount of charge of a phosphor can be suppressed within ±0.01 ?C/g. Controlling the amount of charge of phosphors close to zero can keep impurity gases away from the phosphor particle when the panel is in operation, suppressing problems critical to driving a plasma display unit, such as luminance degradation of phosphors, improper alignment of color in panel operation, luminance degradation when the panel displays all white.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: January 13, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaki Aoki, Yumi Kondo, Kazuhiko Sugimoto, Hiroshi Setoguchi, Junichi Hibino, Yoshinori Tanaka, Teppei Hosokawa
  • Patent number: 7471042
    Abstract: An object of the present invention is to provide a technique for relatively easily suppressing the yellowing of a Plasma Display Panel in which electrodes comprising silver are disposed on the substrates, and thus render image displays with high luminance and high quality. In order to achieve the object, an arrangement is made in which the electrodes comprising silver further include an element whose standard electrode potential is lower than that of silver, such as Cr, Al, In, B, and Ti, or a compound of such an element, as a silver ionization inhibiting substance.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: December 30, 2008
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Hideki Asida, Junichi Hibino, Daisuke Adachi
  • Patent number: 7453206
    Abstract: A PDP has first and second substrates which face each other with a space in between. A display electrode pair and a dielectric layer are formed on the first substrate, and a plurality of discharge cells are formed between the first and second substrates along the display electrode pair. In this construction, two or more depressions are provided in the dielectric layer in an area corresponding to each discharge cell. This improves luminous intensity and illumination efficiency. Also, to form the dielectric layer on the first substrate, first a transfer film is made by providing a dielectric precursor layer on a support film, then depressions are formed in the dielectric precursor layer of the transfer film, and lastly the dielectric precursor layer of the transfer film is transferred onto the first substrate. This decreases the number of manufacturing steps and increases the yield, thereby reducing manufacturing costs.
    Type: Grant
    Filed: May 27, 2002
    Date of Patent: November 18, 2008
    Assignee: Panasonic Corporation
    Inventors: Morio Fujitani, Hiroyuki Yonehara, Masaki Aoki, Keisuke Sumida, Hideki Asida, Junichi Hibino
  • Patent number: 7439675
    Abstract: The present invention provides a plasma display panel that suppresses discharge sustain voltage, and reduces brightness degradation of a phosphor. In the plasma display panel, as protective film (14) made of magnesium oxide (MgO) formed on dielectric glass layer (13), protective film (14) made of magnesium oxide (MgO) with oxide added with an electronegativity of 1.4 or higher, is formed to suppress impure gas adsorption by protective film (14), stabilizes discharge sustain voltage, and reduces brightness degradation.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: October 21, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Aoki, Yumi Kondo, Kazuhiko Sugimoto, Hiroshi Setoguchi, Junichi Hibino, Yoshinori Tanaka, Teppei Hosokawa
  • Publication number: 20080239796
    Abstract: A magnetic memory device includes a memory cell including magnetoresistance effect elements MTJ1, MTJ2 and a select transistor connected to the connection node of the magnetoresistance effect elements MTJ1, MTJ2, a first signal line extended in a first direction and connected to the magnetoresistance effect element MTJ1, a second signal line extended in the first direction and connected to the magnetoresistance effect element MTJ2, and a third signal line extended in a second direction and crossing the first signal line in a region where the magnetoresistance effect element MTJ1 is formed and crossing the second signal line in a region where the magnetoresistance effect element MTJ2 is formed. When memory information is written into the memory cell, the memory information to be memorized is switched by directions of write currents to be flowed to the first and the second signal lines.
    Type: Application
    Filed: June 9, 2008
    Publication date: October 2, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Masaki AOKI
  • Patent number: 7425164
    Abstract: A method of manufacturing a plasma display panel is disclosed. The method includes forming at least one of a dielectric layer on a principal face of a substrate, barrier ribs which partition a discharging space on the dielectric layer, and a phosphor layer disposed between the barrier ribs using an inorganic material into which solution including a degassing material is impregnated.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: September 16, 2008
    Assignee: Matshushita Electric Industrial Co., Ltd.
    Inventors: Yoshinori Tanaka, Junichi Hibino, Masaki Aoki, Kazuhiko Sugimoto, Hiroshi Setoguchi
  • Patent number: 7422502
    Abstract: A PDP with superior light-emitting characteristics and color reproduction is achieved by setting the chromaticity coordinate y (the CIE color specification) of light to 0.08 or less, more preferably to 0.07 or less, or 0.06 or less, enabling the color temperature of light to be set to 7,000K or more, and further to 8,000K or more, 9,000K or more, or 10,000K or more. The PDP is manufactured by a method in which the processes for heating the fluorescent substances such as the fluorescent substance baking, sealing material temporary baking, bonding, and exhausting processes are performed in the dry gas atmosphere, or in an atmosphere in which a dry gas is circulated at a pressure lower than the atmospheric pressure.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Kado, Mitsuhiro Ohtani, Masaki Aoki, Kanako Miyashita
  • Patent number: 7423368
    Abstract: The present invention relates to a plasma display device and to a method of producing a phosphor to be used for the device, that prevents the phosphor layer from deteriorating, and improves the luminance, life, and reliability, of a plasma display panel (PDP). The plasma display device is equipped with a plasma display panel in which a plurality of discharge cells are arranged, phosphor layers (110R, 110G, 110B) in color corresponding to each discharge cell are disposed, and phosphor layers (110R, 110G, 110B) are excited by ultraviolet light to emit light. Green phosphor layer (110G) has a green phosphor including Zn2SiO4:Mn, the element ratio of zinc (Zn) to silicon (Si) at the proximity of its surface is 2/1, which is the stoichiometric ratio, and the layer is positively charged or zero-charged.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuichiro Miyamae, Masaki Aoki, Kazuhiko Sugimoto, Keiji Horikawa, Junichi Hibino, Tanaka Yoshinori, Setoguchi Hiroshi
  • Patent number: 7423376
    Abstract: A plasma display device provided with a green color phosphor which is charged entirely with a positive potential, adsorbs only limited amounts of water, carbon monoxide, carbon dioxide and hydrocarbon, and not liable to cause chemical reacttion thereto. The green color phosphor used is any one or a combination two or more kinds of phosphors selected from among compounds defined by the general formulae of M1-xAl12O19:Mnx (where “M” denotes one of Ca, Sr, Eu and Zn) having a magnetoplumbite crystal structure, (Y1-a-yGda) (Ga1-xAlx)3 (BO3)4:Tby, (Y1-a-yGda) (Ga1-xAlx)3 (BO3)4:Cey, Tby, (Y1-a-yGda) BO3:Tby and (Y1-a-yGda)3 (Ga1-xAlx)5 O12:Tby having any of an yttrium borate crystal structure and yttrium aluminate crystal structure.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: September 9, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Setoguchi, Masaki Aoki, Kazuhiko Sugimoto, Yuichiro Miyamae, Junichi Hibino, Yoshinori Tanaka, Keiji Horikawa
  • Patent number: RE40647
    Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: March 10, 2009
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita
  • Patent number: RE40871
    Abstract: The first object of the present invention is to provide a PDP with improved panel brightness which is achieved by improving the efficiency in conversion from discharge energy to visible rays. The second object of the present invention is to provide a PDP with improved panel life which is achieved by improving the protecting layer protecting the dielectrics glass layer. To achieve the first object, the present invention sets the amount of xenon in the discharge gas to the range of 10% by volume to less than 100% by volume, and sets the charging pressure for the discharge gas to the range of 500 to 760 Torr which is higher than conventional charging pressures. With such construction, the panel brightness increases. Also, to achieve the second object, the present invention has, on the surface of the dielectric glass layer, a protecting layer consisting of an alkaline earth oxide with (100)-face or (110)-face orientation.
    Type: Grant
    Filed: November 29, 2001
    Date of Patent: August 18, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaki Aoki, Hideo Torii, Eiji Fujii, Mitsuhiro Ohtani, Takashi Inami, Hiroyuki Kawamura, Hiroyoshi Tanaka, Ryuichi Murai, Yasuhisa Ishikura, Yutaka Nishimura, Katsuyoshi Yamashita