Patents by Inventor Masaki Fujikane

Masaki Fujikane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8455905
    Abstract: Provided is a light-emitting device including: a nitride semiconductor light-emitting element (402) which radiates optically polarized light; and a light emission control layer (404) which covers the light emission surface of the nitride semiconductor light-emitting element (402) and which contains a resin and non-fluorescent particles dispersed in the resin, in which the light emission control layer (404) contains the non-fluorescent particles at a proportion of 0.01 vol % or more and 10 vol % or less, and the non-fluorescent particles have a diameter of 30 nm or more and 150 nm or less.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: June 4, 2013
    Assignee: Panasonic Corporation
    Inventors: Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
  • Publication number: 20130126900
    Abstract: Around a nitride-based semiconductor light-emitting element which has a polarization characteristic, a transparent encapsulating member which has a cylindrical shape is provided such that the symmetry plane of the cylindrical shape forms an angle of 25° to 65° with respect to the polarization direction of the nitride-based semiconductor light-emitting element.
    Type: Application
    Filed: August 4, 2011
    Publication date: May 23, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Akira Inoue, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20120244686
    Abstract: An exemplary method for fabricating a semiconductor device includes the steps (a) growing a p-type gallium nitride-based compound semiconductor layer in a heated atmosphere; (b) cooling the p-type gallium nitride-based compound semiconductor layer; (c) forming three or more well layers before the step (a); and (d) forming an n-type semiconductor layer on a substrate before the step (c), wherein the step (c) includes growing each of the well layers to a thickness of 5 nm or more with the supply of the hydrogen gas to the reaction chamber cut off, and wherein the step (a) includes supplying hydrogen gas to the reaction chamber, and wherein the step (b) includes cooling the p-type gallium nitride-based compound semiconductor layer with the supply of the hydrogen gas to the reaction chamber cut off.
    Type: Application
    Filed: June 1, 2012
    Publication date: September 27, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Ryou KATO, Masaki FUJIKANE, Akira INOUE, Toshiya YOKOGAWA
  • Patent number: 8268706
    Abstract: A method for fabricating a semiconductor device according to the present invention includes the steps of: growing a p-type gallium nitride-based compound semiconductor layer by performing a metalorganic chemical vapor deposition process in a heated atmosphere so that the crystal-growing plane of the semiconductor layer is an m plane (Step S13); and cooling the p-type gallium nitride-based compound semiconductor layer (Step S14) after the step of growing has been carried out. The step of growing includes supplying hydrogen gas to a reaction chamber in which the p-type gallium nitride-based compound semiconductor layer is grown. The step of cooling includes cooling the p-type gallium nitride-based compound semiconductor layer with the supply of the hydrogen gas to the reaction chamber cut off.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: September 18, 2012
    Assignee: Panasonic Corporation
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Atsushi Yamada, Toshiya Yokogawa
  • Publication number: 20120182495
    Abstract: An illuminating device includes at least first and second nitride-based semiconductor light-emitting elements each having a semiconductor chip with an active layer region. The active layer region is at an angle of 1° or more with an m plane, and an angle formed by a normal line of a principal surface in the active layer region and a normal line of the m plane is 1° or more and 5° or less. The first and second nitride-based semiconductor light-emitting elements have thicnknesses of d1 and d2, respectively, and emit the polarized light having wavelengths ?1 and ?2, respectively, where the inequarities of ?1<?2 and d1<d2 are satisfied.
    Type: Application
    Filed: March 28, 2012
    Publication date: July 19, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Toshiya YOKOGAWA, Akira INOUE, Masaki FUJIKANE, Mitsuaki OYA, Atsushi YAMADA, Tadashi YANO
  • Publication number: 20120146048
    Abstract: Provided is a gallium nitride-based compound semiconductor light-emitting element, in which the concentration of Mg which is a p-type dopant in a p-GaN layer in which the (10-10) m-plane of a hexagonal wurtzite structure grows is adjusted in a range from 1.0×1018 cm?3 to 9.0×1018 cm?3.
    Type: Application
    Filed: February 17, 2012
    Publication date: June 14, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Ryou KATO, Masaki FUJIKANE, Akira INOUE, Toshiya YOKOGAWA
  • Publication number: 20120091490
    Abstract: Provided is a light-emitting device including: a nitride semiconductor light-emitting element (402) which radiates optically polarized light; and a light emission control layer (404) which covers the light emission surface of the nitride semiconductor light-emitting element (402) and which contains a resin and non-fluorescent particles dispersed in the resin, in which the light emission control layer (404) contains the non-fluorescent particles at a proportion of 0.01 vol % or more and 10 vol % or less, and the non-fluorescent particles have a diameter of 30 nm or more and 150 nm or less.
    Type: Application
    Filed: October 17, 2011
    Publication date: April 19, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Masaki FUJIKANE, Akira INOUE, Toshiya YOKOGAWA
  • Publication number: 20120021549
    Abstract: A nitride semiconductor layer formation method includes the steps of: (S1) placing a substrate in a reaction chamber, the substrate including a ?r-plane nitride semiconductor crystal at least in an upper surface; (S2) increasing a temperature of the substrate by heating the substrate placed in the reaction chamber; and (S3) growing a nitride semiconductor layer on the substrate. In the temperature increasing step (S2), a nitrogen source gas and a Group III element source gas are supplied into the reaction chamber.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 26, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Masaki Fujikane, Akira Inoue, Ryou Kato, Toshiya Yokogawa
  • Publication number: 20120002134
    Abstract: An illuminating device according to the present invention includes at least a first nitride-based semiconductor light-emitting element and a second nitride-based semiconductor light-emitting element, in which: the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each include a semiconductor chip; the semiconductor chip includes a nitride-based semiconductor multilayer structure 45 formed from an AlxInyGazN (x+y+z=1, x?0, y?0, z?0) semiconductor, and the nitride-based semiconductor multilayer structure 20 includes an active layer region 24 having an m-plane as an interface; the first nitride-based semiconductor light-emitting element and the second nitride-based semiconductor light-emitting element each emit polarized light from the active layer region 24; and, when the polarized light emitted from the first nitride-based semiconductor light-emitting element and the polarized light emitted from the second nitride-based semiconductor ligh
    Type: Application
    Filed: July 9, 2009
    Publication date: January 5, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Toshiya Yokogawa, Akira Inoue, Masaki Fujikane, Mitsuaki Oya, Atsushi Yamada, Tadashi Yano
  • Publication number: 20120001223
    Abstract: A nitride-based semiconductor light-emitting device 31 includes: an n-type GaN substrate 1 which has an m-plane principal surface; a current diffusing layer 7 provided on the n-type GaN substrate 1; an n-type nitride semiconductor layer 2 provided on the current diffusing layer 7; an active layer 3 provided on the n-type nitride semiconductor layer 2; a p-type nitride semiconductor layer 4 provided on the active layer 3; a p-electrode 5 which is in contact with the p-type nitride semiconductor layer 4; and an n-electrode 6 which is in contact with the n-type GaN substrate 1 or the n-type nitride semiconductor layer 2. The donor impurity concentration of the n-type nitride semiconductor layer 2 is not more than 5×1018 cm?3, and the donor impurity concentration of the current diffusing layer 7 is ten or more times the donor impurity concentration of the n-type nitride semiconductor layer 2.
    Type: Application
    Filed: December 27, 2010
    Publication date: January 5, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Akira Inoue, Junko Iwanaga, Ryou Kato, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20110297956
    Abstract: The present invention is a method of manufacturing a gallium nitride-based compound semiconductor, including growing an m-plane InGaN layer whose emission peak wavelength is not less than 500 nm by metalorganic chemical vapor deposition. Firstly, step (A) of heating a substrate in a reactor is performed. Then, step (B) of supplying into the reactor a gas which contains an In source gas, a Ga source gas, and a N source gas and growing an m-plane InGaN layer of an InxGa1-xN crystal on the substrate at a growth temperature from 700° C. to 775° C. is performed. In step (B), the growth rate of the m-plane InGaN layer is set in a range from 4.5 nm/min to 10 nm/min.
    Type: Application
    Filed: October 21, 2009
    Publication date: December 8, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
  • Patent number: 8058639
    Abstract: A light-emitting apparatus of the present invention includes: a mounting base 260 which has a wire 265; and a nitride-based semiconductor light-emitting device flip-chip mounted on the mounting base 260. The nitride-based semiconductor light-emitting device 100 includes a GaN-based substrate 10 which has an m-plane surface 12, a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN-based substrate 10, and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32. The Mg layer 32 is in contact with the surface of the p-type semiconductor region of the semiconductor multilayer structure 20. The electrode 30 is coupled to the wire 265.
    Type: Grant
    Filed: April 5, 2010
    Date of Patent: November 15, 2011
    Assignee: Panasonic Corporation
    Inventors: Akira Inoue, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20110198568
    Abstract: A light-emitting apparatus of the present invention includes: a mounting base 260 which has a wire 265; and a nitride-based semiconductor light-emitting device flip-chip mounted on the mounting base 260. The nitride-based semiconductor light-emitting device 100 includes a GaN-based substrate 10 which has an m-plane surface 12, a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN-based substrate 10, and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32. The Mg layer 32 is in contact with the surface of the p-type semiconductor region of the semiconductor multilayer structure 20. The electrode 30 is coupled to the wire 265.
    Type: Application
    Filed: April 5, 2010
    Publication date: August 18, 2011
    Inventors: Akira Inoue, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20110179993
    Abstract: A nitride semiconductor layer formation method includes the steps of: (S1) placing a substrate in a reaction chamber, the substrate including an m-plane nitride semiconductor crystal at least in an upper surface; (S2) increasing a temperature of the substrate by heating the substrate placed in the reaction chamber; and (S3) growing a nitride semiconductor layer on the substrate. In the temperature increasing step (S2), a nitrogen source gas and a Group III element source gas are supplied into the reaction chamber, whereby an m-plane nitride semiconductor crystal having a smooth surface can be formed even if the thickness of the layer is 400 nm, and its growth time can be greatly decreased.
    Type: Application
    Filed: November 26, 2009
    Publication date: July 28, 2011
    Inventors: Akira Inoue, Ryou Kato, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20110159667
    Abstract: A method for fabricating a semiconductor device according to the present invention includes the steps of: growing a p-type gallium nitride-based compound semiconductor layer by performing a metalorganic chemical vapor deposition process in a heated atmosphere so that the crystal-growing plane of the semiconductor layer is an m plane (Step S13); and cooling the p-type gallium nitride-based compound semiconductor layer (Step S14) after the step of growing has been carried out. The step of growing includes supplying hydrogen gas to a reaction chamber in which the p-type gallium nitride-based compound semiconductor layer is grown. The step of cooling includes cooling the p-type gallium nitride-based compound semiconductor layer with the supply of the hydrogen gas to the reaction chamber cut off.
    Type: Application
    Filed: July 29, 2009
    Publication date: June 30, 2011
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Atsushi Yamada, Toshiya Yokogawa