Patents by Inventor Masaki Hiromori

Masaki Hiromori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8289855
    Abstract: A method of fault notification in a communication apparatus, including terminating transmission of a signal over a transmission link; determining whether or not a specified fault notification signal is detected in a reception link and storing a determination result from the determining; and upon detection of a fault in the reception link after starting an operation, outputting a specified fault notification signal to the transmission link when the stored determination result is affirmative.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: October 16, 2012
    Assignee: Fujitsu Limited
    Inventors: Hirofumi Fujiyama, Satoshi Tomie, Masaki Hiromori
  • Publication number: 20100211831
    Abstract: A method of fault notification in a communication apparatus, including terminating transmission of a signal over a transmission link; determining whether or not a specified fault notification signal is detected in a reception link and storing a determination result from the determining; and upon detection of a fault in the reception link after starting an operation, outputting a specified fault notification signal to the transmission link when the stored determination result is affirmative.
    Type: Application
    Filed: February 16, 2010
    Publication date: August 19, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Hirofumi FUJIYAMA, Satoshi Tomie, Masaki Hiromori
  • Patent number: 7529290
    Abstract: A radar apparatus has a code generator, a transmission section, a reception section, a delay section, a despreading processor, a correlation value detector, a target detector, and an adjustment section. The transmission section transmits a signal modulated with a spectrum spread code. The reception section receives a direct wave from the transmission section and a reflection wave of the transmitted signal from a target. The delay section delays the despread code stepwise. The despreading processor performs a despreading processing with respect to a signal obtained from the reflection wave received, with using the despread code delayed. The correlation value detector detects a correlation value from data output from the despreading processor. The adjustment section adjusts a phase shift between the spectrum spread code and the despread code so that a correlation strength of the direct wave is equal to or larger than a predetermined value.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: May 5, 2009
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventor: Masaki Hiromori
  • Publication number: 20090003205
    Abstract: A method for a load distribution control of packet transmission includes calculating bandwidths of individual physical ports at a time when inputted packets are distributed to the plurality of physical ports, using each of a plurality of hash calculation formulas; selecting one of the hash calculation formulas so that the calculated bandwidths of the packets for the respective physical ports may become uniform; and distributing and delivering the packets to the respective physical ports using the updated hash calculation formula.
    Type: Application
    Filed: June 23, 2008
    Publication date: January 1, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi Tomie, Hideki Shiono, Masaki Hiromori, Takanori Yasui, Sadayoshi Handa, Hirohumi Fujiyama
  • Publication number: 20080077741
    Abstract: A dynamic memory management method and apparatus wherein an area of a memory is partitioned into a plurality of areas to form memory banks. The different priority classes share the memory banks. A policer (write controller) dynamically assigns input frame data of a plurality of classes having different degrees of priority to memory banks in accordance with the degrees of priority and stores the data there for each priority class. A scheduler (read controller) sequentially reads out the data from the frame data stored in the memory bank assigned to the class having the highest degree of priority and transmits the same. For storage of frame data of a priority of class input in a burst like manner, a plurality of memory banks are assigned to that priority class so as to raise the burst tolerance. By controlling writing and reading of data in units of memory banks, the control can be simplified. Due to this, the efficiency of usage of memory is improved and the write/read control is simplified.
    Type: Application
    Filed: July 30, 2007
    Publication date: March 27, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takanori Yasui, Hideki Shiono, Masaki Hiromori, Hirofumi Fujiyama, Satoshi Tomie, Yasuhiro Yamauchi, Sadayoshi Handa
  • Publication number: 20070223386
    Abstract: In a monitoring device and system, a monitoring data inserter inserts monitoring data of a predetermined pattern into an idle period of input data to be transmitted to a transmission line. A monitoring data checker having received the monitoring data through the transmission line, when determining that the monitoring data does not maintain the predetermined pattern, provides selective switchover instructions to a selector to be controlled. Then, the monitoring data checker sequentially performs a selective switchover to processors, thereby detecting a failure point in the processors. Also, when the failure point in the processors can not be detected, the monitoring data checker provides channel switchover instructions to a switching portion and performs a channel switchover of the transmission line, thereby detecting which channel of the transmission line has caused a failure.
    Type: Application
    Filed: August 11, 2006
    Publication date: September 27, 2007
    Inventors: Takanori Yasui, Hideki Shiono, Masaki Hiromori, Hirofumi Fujiyama, Satoshi Tomie
  • Publication number: 20070182464
    Abstract: An accurate intermittent triangular wave signal without waveform distortion is generated by a triangular wave generation circuit 1 including a rectangular wave generation circuit 111 for generating an intermittent rectangular wave signal in which a rectangular wave interval and a direct current interval of a predetermined level are repeated; an integration circuit 12 for generating an intermittent triangular wave signal in which a triangular wave interval and a direct current interval are repeated based on a reference signal and the intermittent rectangular wave signal generated by the rectangular wave generation circuit 111; and a triangular wave correcting circuit 112 for correcting waveform distortion of the intermittent triangular wave signal based on a differential voltage between a starting point and an ending point of the direct current interval of the intermittent triangular wave signal output from the integration circuit 12.
    Type: Application
    Filed: January 25, 2007
    Publication date: August 9, 2007
    Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED
    Inventors: Yasuhiro Sekiguchi, Masaki Hiromori
  • Patent number: 7148841
    Abstract: A radar device includes a code generator, a transmission section, a reception section, a delay section, a despreading process section, a correlation value detection section, a target detection section, an estimation section, an acquisition section, and a correction section. The estimation section estimates a reception intensity of a reflection wave from a target located at a first distance on a basis of a detected correlation value. The acquisition section acquires a cross-correlation value between the first distance and a second distance, on a basis of the estimated reception intensity of the reflection wave from the target located at the first distance, a delayed despreading code used to detect a correlation value for the first distance and a delayed despreading code used to detect a correlation value for the second distance. The correction section corrects the correlation value for the second distance on a basis of the cross-correlation value.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: December 12, 2006
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Kimihisa Yoneda, Masaki Hiromori
  • Patent number: 7075477
    Abstract: A radar includes a transmission signal processing system, a reception signal processing system, an auxiliary signal processing system, a transmission-signal input unit, and a search determination unit. The transmission signal processing system transmits a transmission signal. The reception signal processing system receives and processes a reflected wave at a target. The auxiliary signal processing system is separate from the reception signal processing system and has the same configuration as at least a part of the reception signal processing system having a low operation speed. The transmission-signal input unit inputs a signal generated in the transmission signal processing system to the auxiliary signal processing system directly. The search determination unit makes a determination on the search for the target on the basis of processing results of the received reflected wave by the reception signal processing system and the directly input signal by the auxiliary signal processing system.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: July 11, 2006
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Masaki Hiromori, Etsuo Kakishita
  • Publication number: 20060055588
    Abstract: A radar device includes a code generator, a transmission section, a reception section, a delay section, a despreading process section, a correlation value detection section, a target detection section, an estimation section, an acquisition section, and a correction section. The estimation section estimates a reception intensity of a reflection wave from a target located at a first distance on a basis of a detected correlation value. The acquisition section acquires a cross-correlation value between the first distance and a second distance, on a basis of the estimated reception intensity of the reflection wave from the target located at the first distance, a delayed despreading code used to detect a correlation value for the first distance and a delayed despreading code used to detect a correlation value for the second distance. The correction section corrects the correlation value for the second distance on a basis of the cross-correlation value.
    Type: Application
    Filed: March 16, 2005
    Publication date: March 16, 2006
    Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED
    Inventors: Kimihisa Yoneda, Masaki Hiromori
  • Patent number: 6989784
    Abstract: A transmission-reception apparatus includes a transmission section, a reception section, a transmission control section, a signal detection section, and an operation determination section. The transmission section transmits a signal to a surrounding space. The reception section receives the signal from the surrounding space. The transmission control section controls the transmission section to transmit the signal in a pulse shape. The signal detection section detects level of the signal received by the reception section. The operation determination section determines as to whether or not a timing at which the level of the received signal exceeds a first determination level is within a first time period on the basis of detection result and a timing at which the transmission control section controls the transmission section to transmit the signal in the pulse shape, to determine as to whether or not the transmission section and the reception section operate normally.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: January 24, 2006
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Masaki Hiromori, Kimihisa Yoneda
  • Publication number: 20050219117
    Abstract: A transmission-reception apparatus includes a transmission section, a reception section, a transmission control section, a signal detection section, and an operation determination section. The transmission section transmits a signal to a surrounding space. The reception section receives the signal from the surrounding space. The transmission control section controls the transmission section to transmit the signal in a pulse shape. The signal detection section detects level of the signal received by the reception section. The operation determination section determines as to whether or not a timing at which the level of the received signal exceeds a first determination level is within a first time period on the basis of detection result and a timing at which the transmission control section controls the transmission section to transmit the signal in the pulse shape, to determine as to whether or not the transmission section and the reception section operate normally.
    Type: Application
    Filed: May 28, 2004
    Publication date: October 6, 2005
    Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED
    Inventors: Masaki Hiromori, Kimihisa Yoneda
  • Publication number: 20050180491
    Abstract: A radar apparatus has a code generator, a transmission section, a reception section, a delay section, a despreading processor, a correlation value detector, a target detector, and an adjustment section. The transmission section transmits a signal modulated with a spectrum spread code. The reception section receives a direct wave from the transmission section and a reflection wave of the transmitted signal from a target. The delay section delays the despread code-stepwise. The despreading processor performs a despreading processing with respect to a signal obtained from the reflection wave received, with using the despread code delayed. The correlation value detector detects a correlation value from data output from the despreading processor. The adjustment section adjusts a phase shift between the spectrum spread code and the despread code so that a correlation strength of the direct wave is equal to or larger than a predetermined value.
    Type: Application
    Filed: February 17, 2005
    Publication date: August 18, 2005
    Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED
    Inventor: Masaki Hiromori
  • Publication number: 20050001758
    Abstract: A radar includes a transmission signal processing system, a reception signal processing system, an auxiliary signal processing system, a transmission-signal input unit, and a search determination unit. The transmission signal processing system transmits a transmission signal. The reception signal processing system receives and processes a reflected wave at a target. The auxiliary signal processing system is separate from the reception signal processing system and has the same configuration as at least a part of the reception signal processing system having a low operation speed. The transmission-signal input unit inputs a signal generated in the transmission signal processing system to the auxiliary signal processing system directly. The search determination unit makes a determination on the search for the target on the basis of processing results of the received reflected wave by the reception signal processing system and the directly input signal by the auxiliary signal processing system.
    Type: Application
    Filed: June 1, 2004
    Publication date: January 6, 2005
    Applicants: FUJITSU TEN LIMITED, FUJITSU LIMITED
    Inventors: Masaki Hiromori, Etsuo Kakishita
  • Patent number: 6600742
    Abstract: In an SDH transmission unit, a tributary block includes a plurality of routing blocks for accommodating low speed line signals of a predetermined capacity and performing line selection processing of the low speed line signals to be interfaced with a high speed block in accordance with a form of a tributary network. The form of the tributary network includes various line speeds and network configurations. At least one of the routing blocks serves, when the low speed line signals accommodated therein do not fully occupy the predetermined capacity, as a master block which accommodates at least one of the other routing blocks as a slave block in order to accommodate the low speed line signals accommodated in the other routing block.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: July 29, 2003
    Assignee: Fujitsu Limited
    Inventors: Masaki Hiromori, Seiji Matsuzaki, Hiroyuki Matsuo, Hirokazu Ito
  • Patent number: 6400614
    Abstract: A transmission device and an integrated circuit improved in quality and reliability of digital transmission control. A memory stores an input signal, write address generating means generates a write address for writing in the memory, and read address generating means generates a read address for reading from the memory. Phase state monitoring means monitors a transition from a steady phase state in which writing/reading in/from the memory is normally performed or from a startup state to a coincident phase state in which address values of the write and read addresses coincide with each other or to an unstable phase state in which a phase fluctuation margin is one-sided. When the coincident phase state or the unstable phase state is detected, reset signal output means outputs a reset signal to the write and read address generating means such that the phase relation between the write and read addresses is brought to an optimum phase relation.
    Type: Grant
    Filed: July 11, 2001
    Date of Patent: June 4, 2002
    Assignee: Fujitsu Limited
    Inventors: Masaki Hiromori, Seiji Matsuzaki, Toshiaki Asai, Yoshinari Oshio, Masato Hashizume, Megumi Shibata, Yuji Kamura