Patents by Inventor Masaki Kanemaru

Masaki Kanemaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240159876
    Abstract: A distance measuring device includes: a light source that emits irradiation light; a solid-state imaging device that generates, for each of pixels, a plurality of packets that hold signal charges generated at different exposure timings for the irradiation light; and a signal processing circuit that calculates a distance value based on the plurality of packets. For each of the pixels, the signal processing circuit: determines presence or absence of stray light using the plurality of packets corresponding to the pixel; when it is determined that there is no stray light, calculates a distance value of the pixel using a first process; and when it is determined that there is stray light, calculates a distance value of the pixel using a second process different from the first process.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Masaki KANEMARU, Yoshinao KAWAI, Toshiaki HIRAOKA
  • Publication number: 20240142628
    Abstract: An object detection device includes: a light emitter that emits light; a sensor that generates a first pixel signal by exposure to reflected light according to a combination of emission by the light emitter and first exposure and a second pixel signal by exposure to reflected light according to a combination of the emission and second exposure; and a distance calculator that generates a distance image by ratio operation using the first pixel signal and the second pixel signal. Timing of the first exposure is set to timing during which the sensor is not exposed to reflected waves from an object included in a first section in which a distance from the object detection device is from 0 to a predetermined value. A time difference between the emission and the second exposure is greater than a time difference between the emission and the first exposure.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Tetsuro OKUYAMA, Yoshinao KAWAI, Masaki KANEMARU
  • Publication number: 20240112478
    Abstract: An object detecting device includes: a first luminance obtainer and a distance obtainer that obtain a first luminance image and a depth image, respectively; a first clustering unit that generates a group that is a set of pixels taken as the same object in the depth image, and determines that the group is a cluster when a total number of pixels included in the group is at least a first threshold; a second clustering unit that determines that the group is a cluster, when (i) the total number of pixels included in the group is less than the first threshold and (ii) luminance of a pixel group in the first luminance image which corresponds to the group is at least a second threshold; and a 3D object detector that generates 3D object information indicating an object in the depth image which is detected based on the cluster.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventors: Masaki KANEMARU, Tetsuro OKUYAMA, Yoshinao KAWAI
  • Publication number: 20200398828
    Abstract: This measurement device is provided with: a relative velocity calculation unit that calculates the relative velocity of an object with respect to a mobile body or the relative velocity of the mobile body with respect to the object on the basis of a sound wave which is transmitted to the object from a transmission unit provided to the mobile body and a reflected wave that results from reflection of the transmitted sound wave on the object and that is received by a reception unit provided to the mobile body; a flight time measurement unit that measures flight time which is the time required for a transmitted ultrasonic wave to reflect on the object and to reach the reception unit; and a position identification unit that identifies the position of the object on the basis of the relative velocity and the flight time.
    Type: Application
    Filed: February 15, 2019
    Publication date: December 24, 2020
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Yuichi ISHIKAWA, Masaki KANEMARU
  • Patent number: 9841486
    Abstract: A detection calibration circuit includes a first distributor distributing a high frequency input signal, an amplifier amplifying the first high frequency output signal of the first distributor, a second distributor distributing the amplified first high frequency output signal of the first distributor, a reference signal generator outputting a reference signal in accordance with a switchable reference voltage, a switcher selecting a third high frequency output signal of the second distributor or a reference signal of the reference signal generator and outputting the selected signal, a detector detecting the third high frequency output signal of the second distributor or the reference signal of the reference signal generator from the switcher, a sensitivity switcher adjusting a sensitivity for an output signal of the detector, and a calibration control circuit adjusting a detection gain of an input signal of the detector and an input-output sensitivity for an output signal of the detector.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: December 12, 2017
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Taiji Akizuki, Masaki Kanemaru
  • Publication number: 20170343650
    Abstract: A radar apparatus mounted on a moving body includes a signal transceiver that receives one or more radar signals reflected by one or more second reflection points of one or more targets located in a scan range with a plurality of antennas, detection circuitry that detects an azimuth angle of the one or more second reflection points of the one or more targets on the basis of a correspondence between a phase difference among the plurality of antennas and an azimuth angle and a phase difference observed in the scan range among the plurality of antennas, calculation circuitry that selects the one or more second reflection points located in a second range that differs from a first range including a central axis on which the phase difference among the antennas is zero and calculates a second azimuth angle error, and correction circuitry that corrects the correspondence.
    Type: Application
    Filed: May 22, 2017
    Publication date: November 30, 2017
    Inventors: MASAKI KANEMARU, HIROSHI TANAKA
  • Patent number: 9602066
    Abstract: A polarity-switching amplifier circuit includes: a first amplifying transistor and a second amplifying transistor, a transformer which includes a primary winding and a secondary winding, and a polarity-switching controller. An unbalanced input signal is input to the first amplifying transistor and the second amplifying transistor. The transformer receives an output signal of the first amplifying transistor and an output signal of the second amplifying transistor as a balanced signal input to the primary winding, and outputs a signal from the secondary winding. The polarity-switching controller turns on one of the first amplifying transistor and the second amplifying transistor and turns off the other thereof.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: March 21, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Isao Imazeki, Masaki Kanemaru
  • Publication number: 20160352370
    Abstract: A local oscillation signal level adjustment circuit includes: a local oscillation circuit that outputs a local oscillation signal; a variable gain amplifier that amplifies the local oscillation signal level; a frequency conversion circuit that converts a radio signal into an analog baseband signal by using the local oscillation signal thus amplified; an A/D converter that converts the analog baseband signal into an output code of a digital baseband signal; and a control circuit that controls a gain of the variable gain amplifier on a basis of the output code of the digital baseband signal, wherein the control circuit increases the gain of the variable gain amplifier until the output code of the digital baseband signal becomes saturated.
    Type: Application
    Filed: May 17, 2016
    Publication date: December 1, 2016
    Inventors: KAZUTOSHI SATOU, MASAKI KANEMARU
  • Patent number: 9407222
    Abstract: A variable matching circuit includes a transformer which is disposed between first and second transistor circuits. A primary inductor device and a secondary inductor device are magnetically coupled in the transformer. The primary inductor device is connected between an output terminal of the first transistor circuit and a bias circuit for the first transistor circuit. The secondary inductor device is connected between an input terminal of the second transistor circuit and a bias circuit for the second transistor circuit. Connection points between the primary inductor device and the bias circuit for the first transistor circuit and between the secondary inductor device and the bias circuit for the second transistor circuit are connected to first and second capacitive elements, respectively. At least one of inductance values of the respective primary and secondary inductor devices and capacitance values of the respective first and second capacitive elements is variable.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: August 2, 2016
    Assignee: PANASONIC CORPORATION
    Inventor: Masaki Kanemaru
  • Patent number: 9276400
    Abstract: A protection circuit includes a transformer (11), wherein a terminal (11a) of the transformer (11) is connected to a terminal part (1) of a radio IC, a terminal (11b) thereof is connected to a grounding point, a terminal (11c) thereof is connected to an input or output of an on-chip circuit (7), and a terminal (11d) thereof is connected to a bias power supply circuit (18). A signal is transmitted between a terminal-side inductor (11f) and a circuit-side inductor (11g) due to magnetic coupling therebetween. The terminal-side inductor and the circuit-side inductor are insulated to each other from a standpoint of DC and hence isolated completely to each other. Thus, different voltages can be applied to the terminal part (1) and the input or output of the on-chip circuit (7), respectively.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: March 1, 2016
    Assignee: PANASONIC CORPORATION
    Inventor: Masaki Kanemaru
  • Publication number: 20150338495
    Abstract: A detection calibration circuit includes a first distributor distributing a high frequency input signal, an amplifier amplifying the first high frequency output signal of the first distributor, a second distributor distributing the amplified first high frequency output signal of the first distributor, a reference signal generator outputting a reference signal in accordance with a switchable reference voltage, a switcher selecting a third high frequency output signal of the second distributor or a reference signal of the reference signal generator and outputting the selected signal, a detector detecting the third high frequency output signal of the second distributor or the reference signal of the reference signal generator from the switcher, a sensitivity switcher adjusting a sensitivity for an output signal of the detector, and a calibration control circuit adjusting a detection gain of an input signal of the detector and an input-output sensitivity for an output signal of the detector.
    Type: Application
    Filed: May 15, 2015
    Publication date: November 26, 2015
    Inventors: TAIJI AKIZUKI, MASAKI KANEMARU
  • Publication number: 20150137892
    Abstract: A polarity-switching amplifier circuit includes: a first amplifying transistor and a second amplifying transistor, a transformer which includes a primary winding and a secondary winding, and a polarity-switching controller. An unbalanced input signal is input to the first amplifying transistor and the second amplifying transistor. The transformer receives an output signal of the first amplifying transistor and an output signal of the second amplifying transistor as a balanced signal input to the primary winding, and outputs a signal from the secondary winding. The polarity-switching controller turns on one of the first amplifying transistor and the second amplifying transistor and turns off the other thereof.
    Type: Application
    Filed: March 20, 2014
    Publication date: May 21, 2015
    Applicant: Panasonic Intellectual Property Management Co., Lt d.
    Inventors: Isao Imazeki, Masaki Kanemaru
  • Publication number: 20150116037
    Abstract: A variable matching circuit includes a transformer which is disposed between first and second transistor circuits. A primary inductor device and a secondary inductor device are magnetically coupled in the transformer. The primary inductor device is connected between an output terminal of the first transistor circuit and a bias circuit for the first transistor circuit. The secondary inductor device is connected between an input terminal of the second transistor circuit and a bias circuit for the second transistor circuit. Connection points between the primary inductor device and the bias circuit for the first transistor circuit and between the secondary inductor device and the bias circuit for the second transistor circuit are connected to first and second capacitive elements, respectively. At least one of inductance values of the respective primary and secondary inductor devices and capacitance values of the respective first and second capacitive elements is variable.
    Type: Application
    Filed: February 26, 2014
    Publication date: April 30, 2015
    Inventor: Masaki Kanemaru
  • Patent number: 8766834
    Abstract: The discrete time analog circuit (100) is provided with: a rotate capacitor circuit (150); an amplifier (141) that is connected to the input line or the output line of the rotate capacitor (150), and amplifies the input potential or input charge; a coefficient circuit (140) that is positioned in series with the amplifier (141), and has two history capacitors (143-1, 143-2) positioned parallel to each other; a first active capacitor among the two history capacitors (143-1, 143-2) that is connected to and charges the amplifier (141); and a clock generation circuit (110) that is connected to the input line or the output line without the involvement of the amplifier (141), and that sequentially changes the pairing of the rotate capacitor circuit (150) a second active capacitor, which shares a charge with the rotate capacitor circuit (150).
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: July 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Hiroka Shiozaki, Kiyomichi Araki, Yohei Morishita, Masaki Kanemaru
  • Publication number: 20140168834
    Abstract: A protection circuit includes a transformer (11), wherein a terminal (11a) of the transformer (11) is connected to a terminal part (1) of a radio IC, a terminal (11b) thereof is connected to a grounding point, a terminal (11c) thereof is connected to an input or output of an on-chip circuit (7), and a terminal (11d) thereof is connected to a bias power supply circuit (18). A signal is transmitted between a terminal-side inductor (11f) and a circuit-side inductor (11g) due to magnetic coupling therebetween. The terminal-side inductor and the circuit-side inductor are insulated to each other from a standpoint of DC and hence isolated completely to each other. Thus, different voltages can be applied to the terminal part (1) and the input or output of the on-chip circuit (7), respectively.
    Type: Application
    Filed: December 11, 2012
    Publication date: June 19, 2014
    Inventor: Masaki Kanemaru
  • Publication number: 20130222164
    Abstract: The discrete time analog circuit (100) is provided with: a rotate capacitor circuit (150); an amplifier (141) that is connected to the input line or the output line of the rotate capacitor (150), and amplifies the input potential or input charge; a coefficient circuit (140) that is positioned in series with the amplifier (141), and has two history capacitors (143-1, 143-2) positioned parallel to each other; a first active capacitor among the two history capacitors (143-1, 143-2) that is connected to and charges the amplifier (141); and a clock generation circuit (110) that is connected to the input line or the output line without the involvement of the amplifier (141), and that sequentially changes the pairing of the rotate capacitor circuit (150) a second active capacitor, which shares a charge with the rotate capacitor circuit (150).
    Type: Application
    Filed: July 27, 2011
    Publication date: August 29, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroka Shiozaki, Kiyomichi Araki, Yohei Morishita, Masaki Kanemaru
  • Patent number: D714745
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: October 7, 2014
    Assignee: Panasonic Corporation
    Inventors: Masaki Kanemaru, Takahiro Shima, Tosiakira Andou