Patents by Inventor Masaki Okamoto
Masaki Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240163555Abstract: An image processing device is disclosed that includes an image acquisition unit configured to acquire a captured image captured by an imaging device fixed to a moving object; a behavior data acquisition unit configured to acquire behavior data indicating behavior of the moving object when moving; a determination unit configured to determine whether or not the captured image includes scenery outside the moving object; and an image processing unit configured to, when the captured image is determined to include the scenery outside the moving object, perform shake correction processing on the captured image based on the behavior data acquired by the behavior data acquisition unit so as to cancel the shaking of the captured image due to the behavior.Type: ApplicationFiled: March 18, 2021Publication date: May 16, 2024Applicant: Nissan Motor Co., Ltd.Inventors: Jun Kasai, Hirofumi Inoue, Yu Shikoda, Masaki Okamoto, Takehito Teraguchi, Fangge Chen
-
Patent number: 11948833Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.Type: GrantFiled: October 22, 2021Date of Patent: April 2, 2024Assignee: Sony Group CorporationInventor: Masaki Okamoto
-
Publication number: 20240091641Abstract: Methods and apparatus provide for acquiring position information about a head-mounted display; performing information processing using the position information about the head-mounted display; generating and outputting data of an image to be displayed as a result of the information processing; and generating and outputting data of an image of a user guide indicating position information about a user in a real space using the position information about the head-mounted display, where the image of the user guide represents a state of the real space in which the user is physically located, as viewed obliquely.Type: ApplicationFiled: December 4, 2023Publication date: March 21, 2024Applicant: Sony Interactive Entertainment Inc.Inventors: Shoichi Ikenoue, Tatsuo Tsuchie, Tetsugo Inada, Masaki Uchida, Hirofumi Okamoto
-
Publication number: 20240055465Abstract: A highly functional photoelectric conversion element is provided.Type: ApplicationFiled: December 14, 2021Publication date: February 15, 2024Inventors: Kenichi MURATA, Masahiro JOEI, Shintarou HIRATA, Shingo TAKAHASHI, Yoshiyuki OHBA, Takashi KOJIMA, Tomiyuki YUKAWA, Yoshifumi ZAIZEN, Tomohiro SUGIYAMA, Masaki OKAMOTO, Takuya MASUNAGA, Yuki KAWAHARA
-
Publication number: 20240006448Abstract: Provided is an imaging device including: a first semiconductor substrate provided with a photoelectric conversion element, a second semiconductor substrate stacked on the first semiconductor substrate with an interlayer insulating film interposed therebetween and provided with a pixel circuit that reads out charges generated in the photoelectric conversion element as a pixel signal, and a via that penetrates the interlayer insulating film and electrically connects a first surface of the first semiconductor substrate facing the second semiconductor substrate and at least a part of a second surface of the second semiconductor substrate facing the first surface.Type: ApplicationFiled: October 11, 2021Publication date: January 4, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takeya MOCHIZUKI, Keiichi NAKAZAWA, Shinichi YOSHIDA, Kenya NISHIO, Nobutoshi FUJII, Suguru SAITO, Masaki OKAMOTO, Ryosuke KAMATANI, Yuichi YAMAMOTO, Kazutaka IZUKASHI, Yuki MIYANAMI, Hirotaka YOSHIOKA, Hiroshi HORIKOSHI, Takuya KUROTORI, Shunsuke FURUSE, Takayoshi HONDA
-
Publication number: 20230121586Abstract: A sound data processing device includes: a sound data acquisition unit configured to acquire first sound data that is data about a sound whose sound image is localized in a cabin of a vehicle; an object specifying unit configured to specify an attention object that is an object to which an occupant of the vehicle directs attention; a sound data processing unit configured to generate second sound data that is data about the sound for which a sound relating to the attention object is emphasized in comparison with the first sound data; and a sound data output unit configured to output the second sound data to an output device that outputs a sound to the occupant.Type: ApplicationFiled: March 25, 2020Publication date: April 20, 2023Applicant: Nissan Motor Co., Ltd.Inventors: Shota Ohkubo, Hirofumi Inoue, Masaki Okamoto, Jo Nishiyama, Jun Kasai, Tahehito Teraguchi, Yu Shikoda, Fangge Chen
-
Patent number: 11557573Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: GrantFiled: May 19, 2021Date of Patent: January 17, 2023Assignee: SONY GROUP CORPORATIONInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
-
Publication number: 20220278160Abstract: This technology relates to a solid-state imaging device and an electronic apparatus by which image quality can be enhanced. The solid-state imaging device includes a pixel region in which a plurality of pixels are arranged, a first wiring, a second wiring, and a shield layer. The second wiring is formed in a layer lower than that of the first wiring, and the shield layer is formed in a layer lower at least than that of the first wiring. This technology is applicable to a CMOS image sensor, for example.Type: ApplicationFiled: March 15, 2022Publication date: September 1, 2022Inventors: HAJIME YAMAGISHI, KIYOTAKA TABUCHI, MASAKI OKAMOTO, TAKASHI OINOUE, MINORU ISHIDA, SHOTA HIDA, KAZUTAKA YAMANE
-
Patent number: 11289525Abstract: This technology relates to a solid-state imaging device and an electronic apparatus by which image quality can be enhanced. The solid-state imaging device includes a pixel region in which a plurality of pixels are arranged, a first wiring, a second wiring, and a shield layer. The second wiring is formed in a layer lower than that of the first wiring, and the shield layer is formed in a layer lower at least than that of the first wiring. This technology is applicable to a CMOS image sensor, for example.Type: GrantFiled: March 11, 2016Date of Patent: March 29, 2022Assignee: Sony CorporationInventors: Hajime Yamagishi, Kiyotaka Tabuchi, Masaki Okamoto, Takashi Oinoue, Minoru Ishida, Shota Hida, Kazutaka Yamane
-
Publication number: 20220044962Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.Type: ApplicationFiled: October 22, 2021Publication date: February 10, 2022Applicant: Sony Group CorporationInventor: Masaki Okamoto
-
Patent number: 11177161Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.Type: GrantFiled: May 12, 2020Date of Patent: November 16, 2021Assignee: SONY CORPORATIONInventor: Masaki Okamoto
-
Publication number: 20210272933Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.Type: ApplicationFiled: May 19, 2021Publication date: September 2, 2021Applicant: Sony Group CorporationInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
-
Patent number: 11063020Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.Type: GrantFiled: July 24, 2019Date of Patent: July 13, 2021Assignee: SONY CORPORATIONInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
-
Publication number: 20200273745Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.Type: ApplicationFiled: May 12, 2020Publication date: August 27, 2020Applicant: Sony CorporationInventor: Masaki Okamoto
-
Patent number: 10690814Abstract: Influence of chipping in case of dicing a plurality of stacked substrates is reduced. Provided is a semiconductor device where a substrate, in which a groove surrounding a pattern configured with a predetermined circuit or part is formed, is stacked. The present technology can be applied to, for example, a stacked lens structure where through-holes are formed in each substrate and lenses are disposed in inner sides of the through-holes, a camera module where a stacked lens structure and a light-receiving device are incorporated, a solid-state imaging device where a pixel substrate and a control substrate are stacked, and the like.Type: GrantFiled: July 19, 2016Date of Patent: June 23, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Toshiaki Shiraiwa, Masaki Okamoto, Hiroyasu Matsugai, Hiroyuki Itou, Suguru Saito, Keiji Ohshima, Nobutoshi Fujii, Hiroshi Tazawa, Minoru Ishida
-
Patent number: 10658229Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.Type: GrantFiled: February 27, 2019Date of Patent: May 19, 2020Assignee: Sony CorporationInventor: Masaki Okamoto
-
Publication number: 20190348398Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.Type: ApplicationFiled: July 24, 2019Publication date: November 14, 2019Applicant: Sony CorporationInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
-
Patent number: 10476209Abstract: A shield connector includes a first housing and a second housing, a first shield shell configured to cover the first housing, and a second shield shell configured to cover the second housing. The first shield shell includes a first connecting portion and the second shield shell includes a second connecting portion. An electrically conductive fastening member electrically connects the first connecting portion and the second connecting portion to each other. The first housing includes a first fixing portion, and the second housing includes a second fixing portion. The first fixing portion and the second fixing portion are held together by the fastening member in a state in which the first fixing portion and the second fixing portion are interposed between the first connecting portion and the second connecting portion.Type: GrantFiled: May 12, 2017Date of Patent: November 12, 2019Assignee: SUMITOMO WIRING SYSTEMS, LTD.Inventors: Masaru Kitagawa, Shinyu Nagashima, Masaki Okamoto, Yasuhiro Kudo
-
Publication number: 20190296494Abstract: A shield connector includes a first housing and a second housing, a first shield shell configured to cover the first housing, and a second shield shell configured to cover the second housing. The first shield shell includes a first connecting portion and the second shield shell includes a second connecting portion. An electrically conductive fastening member electrically connects the first connecting portion and the second connecting portion to each other. The first housing includes a first fixing portion, and the second housing includes a second fixing portion. The first fixing portion and the second fixing portion are held together by the fastening member in a state in which the first fixing portion and the second fixing portion are interposed between the first connecting portion and the second connecting portion.Type: ApplicationFiled: May 12, 2017Publication date: September 26, 2019Applicant: SUMITOMO WIRING SYSTEMS, LTD.Inventors: Masaru KITAGAWA, Shinyu NAGASHIMA, Masaki OKAMOTO, Yasuhiro KUDO
-
Patent number: 10373934Abstract: There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a second wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.Type: GrantFiled: February 2, 2018Date of Patent: August 6, 2019Assignee: Sony CorporationInventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda