Patents by Inventor Masaki Yanagisawa

Masaki Yanagisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11346736
    Abstract: A pressure gauge includes an introduction member, a connection member, a bourdon tube, a pointer, a dial plate, a detector, and an information communication unit. A battery installed in the information communication unit is disposed between a circuit board and a lid. The information communication unit is inserted in a through hole of the dial plate to be disposed astride between a front surface and a rear surface of the dial plate and the lid is disposed on a side of the information communication unit close to the front surface of the dial plate.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: May 31, 2022
    Assignee: NAGANO KEIKI CO., LTD.
    Inventors: Hiroyuki Kaneko, Takayuki Mizukoshi, Shota Shioiri, Masaki Yanagisawa, Hidenori Saka, Yutaku Hashimoto
  • Patent number: 11329453
    Abstract: A surface emitting laser includes a substrate, a mesa of semiconductor layers including a lower reflector layer, an active layer, an upper reflector layer, and an upper contact layer that are successively laminated on the substrate, and an electrode provided on the upper contact layer. The upper contact layer includes GaAs. The electrode includes an alloy layer including Pt, in contact with the upper contact layer.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 10, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki Yanagisawa
  • Publication number: 20210131896
    Abstract: A pressure gauge includes an introduction member, a connection member, a bourdon tube, a pointer, a dial plate, a detector, and an information communication unit. A battery installed in the information communication unit is disposed between a circuit board and a lid. The information communication unit is inserted in a through hole of the dial plate to be disposed astride between a front surface and a rear surface of the dial plate and the lid is disposed on a side of the information communication unit close to the front surface of the dial plate.
    Type: Application
    Filed: October 28, 2020
    Publication date: May 6, 2021
    Inventors: Hiroyuki Kaneko, Takayuki Mizukoshi, Shota Shioiri, Masaki Yanagisawa, Hidenori Saka, Yutaku Hashimoto
  • Publication number: 20200412095
    Abstract: A surface emitting laser includes a substrate, a mesa of semiconductor layers including a lower reflector layer, an active layer, an upper reflector layer, and an upper contact layer that are successively laminated on the substrate, and an electrode provided on the upper contact layer. The upper contact layer includes GaAs. The electrode includes an alloy layer including Pt, in contact with the upper contact layer.
    Type: Application
    Filed: April 27, 2020
    Publication date: December 31, 2020
    Inventor: Masaki YANAGISAWA
  • Patent number: 10128633
    Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.
    Type: Grant
    Filed: February 5, 2018
    Date of Patent: November 13, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
  • Publication number: 20180269655
    Abstract: A surface emitting semiconductor laser includes a post disposed on a substrate, the post including an active layer and a distributed Bragg reflector; a first insulating layer disposed on side and top surfaces of the post and on the substrate, the first insulating layer having an opening on the top surface of the post; an electrode disposed in the opening of the first insulating layer; an electric conductor including a pad electrode on the first insulating layer, the electric conductor extending on the first insulating layer to the electrode; and a second insulating layer disposed on the first insulating layer, the electrode, and the electric conductor so as to cover the electrode in the opening of the first insulating layer, the second insulating layer having an opening on the pad electrode, the opening of the second insulating layer having an edge on a top surface of the pad electrode.
    Type: Application
    Filed: February 5, 2018
    Publication date: September 20, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuji Koyama, Masaki Yanagisawa, Yukihiro Tsuji, Hirohiko Kobayashi, Hiroyuki Yoshinaga
  • Patent number: 9272463
    Abstract: A method fix forming a diffraction grating includes the steps of preparing a mold including pattern portions each having a pattern corresponding to a pattern for the diffraction grating; forming a first semiconductor layer on a substrate; forming a resin layer on the first semiconductor layer; pressing the pattern portions of the mold against the resin layer; forming the pattern for the diffraction grating in the resin layer by curing the resin layer; and forming the diffraction grating in the first semiconductor layer by etching the first semiconductor layer using the patterned resin layer. The mold includes a first base and a plurality of second bases disposed on the first base. The first base is made of a flexible material. Each second base is made of a rigid material. The second bases each include one pattern portion and are spaced apart from each other with a predetermined distance.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: March 1, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki Yanagisawa
  • Patent number: 8964809
    Abstract: A semiconductor optical integrated device includes a substrate having a main surface with a first and second regions arranged along a waveguiding direction; a gain region including a first cladding layer, an active layer, and a second cladding layer arranged on the first region of the main surface; and a wavelength control region including a third cladding layer, an optical waveguide layer, and a fourth cladding layer arranged on the second region of the main surface and including a heater arranged along the optical waveguide layer. The substrate includes a through hole extending from a back surface of the substrate in the thickness direction and reaching the first region. A metal member is arranged in the through hole. The metal member extends from the back surface of the substrate in the thickness direction and is in contact with the first cladding layer.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 24, 2015
    Assignee: Sumitomo Electric Industies, Ltd
    Inventors: Yoshihiro Yoneda, Masaki Yanagisawa, Kenji Koyama, Hirohiko Kobayashi, Kenji Hiratsuka
  • Patent number: 8921133
    Abstract: A method of forming a sampled grating includes the steps of preparing a substrate; preparing a nano-imprinting mold including a pattern surface on which projections and recesses are periodically formed; preparing a mask including a light obstructing portion and a light transmitting portion that are alternately provided; forming a photoresist layer and a resin portion in that order on the substrate; forming a patterned resin portion having projections and recesses by pressing the pattern surface of the mold into contact with the resin portion and hardening the resin portion while maintaining the contact; exposing a portion of the photoresist layer by irradiating the photoresist layer with exposing light through the mask and the patterned resin portion; forming a patterned photoresist layer by developing the photoresist layer; and etching the substrate using the patterned photoresist layer.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: December 30, 2014
    Assignee: Sumitomo Electric Industries, Ltd
    Inventor: Masaki Yanagisawa
  • Patent number: 8827685
    Abstract: A nano-imprint mold includes a mold base; mold body having a first surface and a second surface opposite the first surface; and an elastic body disposed between a surface of the mold base and the first surface of the mold body, the elastic body being composed of resin. The second surface of the mold body is provided with a nano-imprint pattern. In addition, the elastic body has a bulk modulus lower than a bulk modulus of the mold body.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: September 9, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yukihiro Tsuji, Masaki Yanagisawa
  • Patent number: 8679392
    Abstract: A process using the nanoimprint technique to form the diffraction grating for the DFB-LD is disclosed. The process includes (a) coating a resist for the EB exposure on a dummy substrate, (b) irradiating the resist as varying the acceleration voltage, (c) forming a resist pattern by developing the irradiated resist, (d) coating the SOG film on the patterned resist, (e) attaching the silica substrate on the cured SOG film, and (f) removing the dummy substrate with the resist from the SOG film and the silica substrate. Using the mold thus formed, the diffraction grating for the DFB-LD is formed by the nanoimprint technique.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: March 25, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Masaki Yanagisawa
  • Publication number: 20140073073
    Abstract: A method for forming a diffraction grating includes the steps of preparing a mold including a pattern portion having a pattern for forming a diffraction grating; forming a first semiconductor layer on a substrate; forming a resin layer on the first semiconductor layer; pressing the pattern portion of the mold against the resin layer; forming the pattern for the diffraction grating in the resin layer by curing the resin layer; and forming the diffraction grating in the first semiconductor layer by etching the first semiconductor layer using the patterned resin layer. The mold includes a first base and a plurality of second bases disposed on the first base. The first base is made of a flexible material. The second base is made of a rigid material. The plurality of second bases each include the pattern portion and are spaced apart from each other with a predetermined distance.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 13, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki YANAGISAWA
  • Patent number: 8637329
    Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: January 28, 2014
    Assignee: Sumitomo Electric Industries Ltd
    Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka
  • Patent number: 8636498
    Abstract: A nano-imprint mold includes a mold body having a first surface provided with a pattern having projections and recesses, a second surface opposite the first surface and a side surface between the first surface and the second surface; and a mold base having a surface for fixing the mold body thereto. In addition, the second surface of the mold body is fixed to a part of the surface of the mold base, the second surface of the mold body being disposed away from at least a part of an edge of the surface of the mold base. Furthermore, the mold body has a shape such that a width thereof in a direction orthogonal to a direction extending from the first surface toward the second surface decreases from the first surface toward the second surface.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: January 28, 2014
    Assignee: Sumitomo Electric Industries Ltd
    Inventors: Yukihiro Tsuji, Masaki Yanagisawa
  • Patent number: 8617912
    Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: December 31, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Masaki Yanagisawa
  • Patent number: 8563342
    Abstract: A method of making a semiconductor optical integrated device includes the steps of forming, on a substrate, a plurality of semiconductor integrated devices including a first optical semiconductor element having a first bonding pad and a second optical semiconductor element; forming a plurality of bar-shaped semiconductor optical integrated device arrays by cutting the substrate, each of the semiconductor optical integrated device arrays including two or more semiconductor optical integrated devices; alternately arranging the plurality of semiconductor optical integrated device arrays and a plurality of spacers in a thickness direction of the substrate so as to be fixed in place; and forming a coating film on a facet of the semiconductor optical integrated device array. Furthermore, the spacer has a movable portion facing the first bonding pad, the movable portion protruding toward the first bonding pad and being displaceable in a protruding direction.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: October 22, 2013
    Assignee: Sumitomo Electric Industries Ltd.
    Inventors: Yoshihiro Yoneda, Hirohiko Kobayashi, Kenji Koyama, Masaki Yanagisawa, Kenji Hiratsuka
  • Publication number: 20130058371
    Abstract: A semiconductor optical integrated device includes a substrate having a main surface with a first and second regions arranged along a waveguiding direction; a gain region including a first cladding layer, an active layer, and a second cladding layer arranged on the first region of the main surface; and a wavelength control region including a third cladding layer, an optical waveguide layer, and a fourth cladding layer arranged on the second region of the main surface and including a heater arranged along the optical waveguide layer. The substrate includes a through hole extending from a back surface of the substrate in the thickness direction and reaching the first region. A metal member is arranged in the through hole. The metal member extends from the back surface of the substrate in the thickness direction and is in contact with the first cladding layer.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 7, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Masaki YANAGISAWA, Kenji KOYAMA, Hirohiko KOBAYASHI, Kenji HIRATSUKA
  • Publication number: 20130011947
    Abstract: A method of forming a sampled grating includes the steps of preparing a substrate; preparing a nano-imprinting mold including a pattern surface on which projections and recesses are periodically formed; preparing a mask including a light obstructing portion and a light transmitting portion that are alternately provided; forming a photoresist layer and a resin portion in that order on the substrate; forming a patterned resin portion having projections and recesses by pressing the pattern surface of the mold into contact with the resin portion and hardening the resin portion while maintaining the contact; exposing a portion of the photoresist layer by irradiating the photoresist layer with exposing light through the mask and the patterned resin portion; forming a patterned photoresist layer by developing the photoresist layer; and etching the substrate using the patterned photoresist layer.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 10, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki YANAGISAWA
  • Publication number: 20130012002
    Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 10, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Hirohiko KOBAYASHI, Kenji KOYAMA, Masaki YANAGISAWA, Kenji HIRATSUKA
  • Publication number: 20130005062
    Abstract: A method for manufacturing a semiconductor laser includes the steps of preparing a mold with a pattern surface having recesses, forming a stacked semiconductor layer including a grating layer, forming a resin part on the grating layer, forming a resin pattern portion on the resin part, forming a diffraction grating by etching the grating layer using the resin part as a mask, and forming a mesa-structure on the stacked semiconductor layer. Each of the recesses includes two end portions and a middle portion between the two end portions. A depth of at least one of the two end portions from the pattern surface is greater than that of the middle portion. The step of forming the mesa-structure includes the step of etching the stacked semiconductor layer so as to remove end portions of the diffraction grating in a direction orthogonal to a periodic direction thereof.
    Type: Application
    Filed: June 21, 2012
    Publication date: January 3, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Masaki YANAGISAWA