Patents by Inventor Masaki Yoneda

Masaki Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069187
    Abstract: An observation allocating section exclusively allocates an observation point to each existing tracker in accordance with a distance between observation information acquired by an information acquiring section and observation information indicated by a predictive distribution. A hypothesis generating section generates a hypothesis likelihood and a hypothesis distribution, for each target tracker and for each hypothesis belonging to a hypothesis group including a first hypothesis and a second hypothesis. The first hypothesis is a hypothesis that the observation point is a result of observation of a subject target. The second hypothesis is a hypothesis that the observation point is not a result of observation of the subject target. The hypothesis likelihood is the likelihood of the hypothesis. The hypothesis distribution is the state distribution updated on the assumption that the hypothesis is correct.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Tetsuya KUSUMOTO, Shingo SHIMIZU, Takashi OGAWA, Masaki YONEDA
  • Publication number: 20230417873
    Abstract: A positional information acquiring unit that acquires positional information in accordance with an object detection signal of the object sensor includes a first acquiring unit that acquires first observation information as positional information using a first threshold, and a second acquiring unit that acquires second observation information as positional information using a second threshold different from the first threshold. The object tracking unit is provided with a first tracking processing unit that executes a tracking process in accordance with the first observation information and a second tracking processing unit that executes the tracking process in accordance with the second observation information. Either one of the first tracking processing unit or the second tracking processing unit has anti-clutter characteristics higher than that of the other one. A state identifying unit identifies the state of the object based on a result of the tracking process executed by the tracking processing unit.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Inventors: Tetsuya KUSUMOTO, Shingo SHIMIZU, Takashi OGAWA, Masaki YONEDA
  • Publication number: 20230282396
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Application
    Filed: May 2, 2023
    Publication date: September 7, 2023
    Inventor: Masaki YONEDA
  • Patent number: 11676742
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Grant
    Filed: April 16, 2021
    Date of Patent: June 13, 2023
    Assignee: ROHM CO, LTD.
    Inventor: Masaki Yoneda
  • Publication number: 20210233687
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Application
    Filed: April 16, 2021
    Publication date: July 29, 2021
    Inventor: Masaki YONEDA
  • Patent number: 11017922
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: May 25, 2021
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Publication number: 20200176152
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Application
    Filed: February 3, 2020
    Publication date: June 4, 2020
    Inventor: Masaki YONEDA
  • Patent number: 10586635
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: March 10, 2020
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Publication number: 20190228886
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Application
    Filed: April 1, 2019
    Publication date: July 25, 2019
    Inventor: Masaki YONEDA
  • Patent number: 10290402
    Abstract: The present invention provides a chip resistor and a method of making the same for alleviating stress resulted from thermal expansion difference and thus suppressing cracks. A chip resistor includes: a substrate, having a carrying surface and a mounting surface facing away from each other; a pair of upper electrodes, disposed at two ends of the carrying surface; a resistor, disposed on the carrying surface and between the pair of upper electrodes, and electrically connected to the pair of upper electrodes; a stress relaxation layer having flexibility and formed on the mounting surface of the substrate; a metal thin film layer, formed on a surface of the stress relaxation layer opposite to the substrate; a side electrode for electrically connecting the upper electrodes and the metal thin film layer; and a plating layer covering the side electrode and the metal thin film layer.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 14, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Patent number: 10290401
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 14, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Patent number: 10102948
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: October 16, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Kenichi Harada, Masaki Yoneda
  • Patent number: 10083779
    Abstract: A chip resistor includes a resistor board, a first electrode, a second electrode and an insulating layer. The second electrode is offset from the first electrode in a lateral direction perpendicular to the thickness direction of the resistor board. The obverse surface of the resistor board includes a first region in contact with the first electrode, a second region in contact with the second electrode and an intermediate region in contact with the insulating layer. The intermediate region is disposed between the first region and the second region in the lateral direction. The first electrode includes a first underlying layer and a first plating layer. The first underlying layer is disposed between the first plating layer and the insulating layer in the thickness direction of the resistor board.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: September 25, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda
  • Patent number: 10074464
    Abstract: There is provided a chip resistor suitable for power detection. The chip resistor includes a resistor having a resistor lower surface and a resistor upper surface which face mutually opposite sides in a thickness direction, a pair of resistor first side surfaces spaced apart from each other in a first direction perpendicular to the thickness direction, and a pair of resistor second side surfaces spaced apart from each other in a second direction perpendicular to both the thickness direction and the first direction, a first electrode formed along one resistor first side surface, and a second electrode formed along the other resistor first side surface, and spaced apart from the first electrode.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: September 11, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Kentaro Naka, Masaki Yoneda
  • Publication number: 20180215574
    Abstract: Even in case a rolled body is stored in a state of being suspended without containing it in a corrugated cardboard box and the like, a leg piece that is fixed in a manner protruded out of a plate-like member can stably keep a holding device for the rolled body relative to a surface of placement in an erected posture. The holding device can prevent the rolled body from easily getting out of position due to swinging and rolling movements. The rolled body can be stored in a corrugated cardboard box while a pair of holding devices remain mounted on the rolled body. In case corrugated cardboard boxes are stored by holding them in a stacked manner, or are transported, the corrugated cardboard boxes can be made harder to get damaged. A holding device is adapted to hold in position a rolled body made up by winding a web. The holding device is attached to each of both longitudinal ends of the rolled body so as to hold a rolled body surface in a state suspended away from a surface of placement thereof.
    Type: Application
    Filed: January 17, 2018
    Publication date: August 2, 2018
    Applicants: LINTEC CORPORATION, TOYO KAKO, INC.
    Inventors: Tatsuya Todokoro, Akira Abe, Toshiaki Amada, Motokazu Asano, Masaki Yoneda
  • Publication number: 20180122536
    Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 3, 2018
    Inventor: Masaki YONEDA
  • Publication number: 20180108459
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Application
    Filed: December 14, 2017
    Publication date: April 19, 2018
    Inventors: Kenichi HARADA, Masaki YONEDA
  • Publication number: 20180096758
    Abstract: A chip resistor includes a resistor board, a first electrode, a second electrode and an insulating layer. The second electrode is offset from the first electrode in a lateral direction perpendicular to the thickness direction of the resistor board. The obverse surface of the resistor board includes a first region in contact with the first electrode, a second region in contact with the second electrode and an intermediate region in contact with the insulating layer. The intermediate region is disposed between the first region and the second region in the lateral direction. The first electrode includes a first underlying layer and a first plating layer. The first underlying layer is disposed between the first plating layer and the insulating layer in the thickness direction of the resistor board.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 5, 2018
    Inventor: Masaki Yoneda
  • Patent number: 9881719
    Abstract: A chip resistor includes first and second electrodes spaced apart from each other, a resistor element arranged on the first and the second electrodes, a bonding layer provided between the resistor element and the two electrodes, and a plating layer electrically connected to the resistor element. The first electrode includes a flat outer side surface, and the resistor element includes a side surface facing in the direction in which the thirst and the second electrodes are spaced. The outer side surface of the first electrode is flush with the side surface of the resistor element. The plating layer covers at least a part of the outer side surface of the first electrode in a manner such that the covering portion of the plating layer extends from one vertical edge of the outer side surface to the other vertical edge.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: January 30, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Kenichi Harada, Masaki Yoneda
  • Patent number: 9870849
    Abstract: A chip resistor includes a resistor board, a first electrode, a second electrode and an insulating layer. The second electrode is offset from the first electrode in a lateral direction perpendicular to the thickness direction of the resistor board. The obverse surface of the resistor board includes a first region in contact with the first electrode, a second region in contact with the second electrode and an intermediate region in contact with the insulating layer. The intermediate region is disposed between the first region and the second region in the lateral direction. The first electrode includes a first underlying layer and a first plating layer. The first underlying layer is disposed between the first plating layer and the insulating layer in the thickness direction of the resistor board.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: January 16, 2018
    Assignee: ROHM CO., LTD.
    Inventor: Masaki Yoneda