Abstract: According to one embodiment, a memory system includes a non-volatile first memory, a second memory, a battery, a first processor, and a second processor. The first processor is configured to execute fault diagnosis on the battery by discharging energy stored in the battery. The second processor is configured to write data cached in the second memory into the first memory and reduce an upper limit of the amount of data to be cached when executing the fault diagnosis than the upper limit of the amount of data to be cached when not executing the fault diagnosis.

Abstract: According to one embodiment, a memory system includes a non-volatile first memory, a second memory, a battery, a first processor, and a second processor. The first processor is configured to execute fault diagnosis on the battery by discharging energy stored in the battery. The second processor is configured to write data cached in the second memory into the first memory and reduce an upper limit of the amount of data to be cached when executing the fault diagnosis than the upper limit of the amount of data to be cached when not executing the fault diagnosis.

Abstract: According to one embodiment, a memory system includes a non-volatile first memory, a second memory, a battery, a first processor, and a second processor. The first processor is configured to execute fault diagnosis on the battery by discharging energy stored in the battery. The second processor is configured to write data cached in the second memory into the first memory and reduce an upper limit of the amount of data to be cached when executing the fault diagnosis than the upper limit of the amount of data to be cached when not executing the fault diagnosis.

Abstract: According to one embodiment, a memory system includes a first memory, a second memory, a third memory, and a memory controller. The first memory includes a plurality of blocks. The second memory stores a first table having a plurality of first correspondences between a logical address and a physical address. The third memory has a higher processing speed than the second memory and stores a second table having second correspondences which are parts of the first correspondences. The memory controller determines whether data in a written block is first data to be copied, using the first table, not the second table. The memory controller copies the first data from the written block to a writable block to copy all data in a first state in the second block to the writable block. The memory controller sets all data in the written block to a second state.

Abstract: According to one embodiment, a memory system includes a non-volatile first memory, a second memory, a battery, a first processor, and a second processor. The first processor is configured to execute fault diagnosis on the battery by discharging energy stored in the battery. The second processor is configured to write data cached in the second memory into the first memory and reduce an upper limit of the amount of data to be cached when executing the fault diagnosis than the upper limit of the amount of data to be cached when not executing the fault diagnosis.

Abstract: According to one embodiment, a memory system includes a first memory, a second memory, a third memory, and a memory controller. The first memory includes a plurality of blocks. The second memory stores a first table having a plurality of first correspondences between a logical address and a physical address. The third memory has a higher processing speed than the second memory and stores a second table having second correspondences which are parts of the first correspondences. The memory controller determines whether data in a written block is first data to be copied, using the first table, not the second table. The memory controller copies the first data from the written block to a writable block to copy all data in a first state in the second block to the writable block. The memory controller sets all data in the written block to a second state.