Patents by Inventor Masami Harigai

Masami Harigai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070090521
    Abstract: It is an object of the present invention to provide a circuit device in which a plurality of circuit elements including a circuit element having a hollow inside are sealed with resin, and to provide a method of manufacturing the same. A circuit device (10) has a first circuit element (13A) having a hollow inside and a plurality of second circuit elements (13B) electrically connected to the first circuit element (13A). The first and second circuit elements (13A) and (13B) are sealed with sealing resin (15). The distances by which the first circuit element (13A) is separated from the second circuit elements (13B) are longer than those by which the second circuit elements (13B) are separated from each other.
    Type: Application
    Filed: September 1, 2004
    Publication date: April 26, 2007
    Applicants: SANYO ELECTRIC CO., LTD., KANTO SANYO SEMICONDUCTORS CO., LTD.
    Inventors: Hideo Imaizumi, Takuji Kato, Kenichi Nakajima, Masami Harigai, Masachika Kuwata, Isao Ochiai, Makoto Tsubonoya, Katsuhiko Shibusawa, Iwao Takase
  • Patent number: 5347365
    Abstract: A synchronizing/separator circuit separates a horizontal synchronizing signal and a vertical synchronizing signal contained within a television signal. A phase locked loop synthesizes a clock signal at 32 fH by phase locking the horizontal synchronizing signal with a divided version of the 32 fH clock signal. The phase locked loop includes a voltage controlled oscillator (VCO) responsive to the phase comparison to perform the phase lock. A circuit separates the run-in clock and caption data in horizontal scanning period 21 H in the vertical blanking interval. A phase comparator receives the run-in clock and phase compares it with the 32 fH clock to produce an alternating control signal which is applied directly to the voltage controlled oscillator for rapid phase locking of the voltage controlled oscillator in preparation for decoding the caption data. The voltage controlled oscillator is controlled by the charging and discharging rate of a capacitor charged by a constant current source.
    Type: Grant
    Filed: September 22, 1992
    Date of Patent: September 13, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masami Harigai, Hiroyasu Kishi
  • Patent number: 5311311
    Abstract: An encoder disconnects video data between a video source and a video using device only during 21H in the vertical blanking interval. During 21H, it applies locally generated coded data signals, in a format detectable by conventional data decoding devices, to the video using device. The video source may be a camera or tape playback, and the using device may be a TV set or a video tape recorder.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: May 10, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masami Harigai, Hiroyasu Shindou