Abstract: There is provided with a filter processing device for performing a convolution operation using a filter on a feature plane. An acquisition unit acquires feature plane data, filter coefficients of the filter, and valid coefficient information which specifies filter coefficients to be used in the convolution operation among the filter coefficients of the filter. A calculation unit performs a convolution operation of the filter coefficients specified by the valid coefficient information and pieces of the feature plane data corresponding to the specified filter coefficients.

Abstract: A filter processing apparatus comprises: K arithmetic operation units configured to perform predetermined arithmetic operation processing parallelly; a data holding unit configured to hold a plurality of data values; a coefficient holding unit configured to hold a plurality of filter coefficients; a first pattern holding unit configured to hold a first pattern that selects K data values from the plurality of data values; a second pattern holding unit configured to hold a second pattern that selects one filter coefficient from the plurality of filter coefficients; and a control unit configured to sequentially input the K data values to the K arithmetic operation units with reference to the first pattern and sequentially input the one common filter coefficient to the K arithmetic operation units with reference to the second pattern.

Abstract: There is provided with a data processing apparatus. An acquisition unit acquires feature plane data of a layer included in a neural network. A control unit outputs a first control signal corresponding to the layer for controlling first compression processing and a second control signal corresponding to the layer for controlling second compression processing. A first compression unit performs the first compression processing corresponding to the first control signal on the feature plane data. A second compression unit performs the second compression processing corresponding to the second control signal on the feature plane data after the first compression processing. A type of processing of the second compression processing is different from the first compression processing.

Abstract: A data processing apparatus for executing data processing using a neural network including a plurality of hierarchal levels includes an extraction unit configured to extract intermediate feature data from input feature data, a calculation unit configured to calculate output feature data by reducing the number of channels of the intermediate feature data, a storage unit configured to store the output feature data calculated by the calculation unit and provide the input feature data to the extraction unit, and a control unit configured to control the number of channels of the intermediate feature data to be extracted by the extraction unit and the number of channels of the output feature data to be calculated by the calculation unit.

Abstract: There is provided a mirror device for a vehicle, including: a support body that is fixed to a vehicle body side and supports a mirror of the vehicle; and a covering body that covers an outer periphery of the support body, wherein the covering body includes: a first covering body, mounting of which to the support body by a linear movement is constrained, the mounting of the first covering body to the support body including turning of the first covering body relative to the support body, and a second covering body that is combined with the first covering body.

Abstract: In order to perform a discrimination calculation using a small-capacity storage unit, a discrimination calculation apparatus comprises a feature calculation unit configured to sequentially calculate a feature of discrimination target data for each hierarchical layer, a discrimination calculation unit configured to sequentially perform a partial discrimination calculation on the discrimination target data using the feature sequentially calculated by the feature calculation unit and store a result of the partial discrimination calculation in a discrimination result storage unit, and a control unit configured to control the discrimination calculation unit to perform a next partial discrimination calculation using the feature sequentially calculated by the feature calculation unit and the result of the partial discrimination calculation stored in the discrimination result storage unit and to store a result of the next partial discrimination calculation in the discrimination result storage unit.

Abstract: A data processing apparatus includes a storage unit configured to store reference data of a filter operation and coefficient data of filters, a plurality of operators configured to parallelly perform the filter operation on the reference data and the coefficient data of the filters, a first supply unit configured to supply reference data transferred from the storage unit to the plurality of operators, a second supply unit configured to supply coefficient data of a first and second filters transferred from the storage unit to the plurality of operators, and a control unit configured to control the second supply unit to supply the coefficient data of the first filter to a first operator, and supply the coefficient data of the second filter to a second operator.

Abstract: A data processing apparatus includes a storage unit configured to store reference data of a filter operation and coefficient data of filters, a plurality of operators configured to parallelly perform the filter operation on the reference data and the coefficient data of the filters, a first supply unit configured to supply reference data transferred from the storage unit to the plurality of operators, a second supply unit configured to supply coefficient data of a first and second filters transferred from the storage unit to the plurality of operators, and a control unit configured to control the second supply unit to supply the coefficient data of the first filter to a first operator, and supply the coefficient data of the second filter to a second operator.

Abstract: An apparatus includes a first holding unit and a second holding unit configured to hold first-type data and second-type data, respectively, a first operation unit configured to execute a first product-sum operation based on the first-type data, a branch unit configured to output an operation result of the first product-sum operation in parallel, a sampling unit configured to sample the operation result and to output a sampling result, and a second operation unit configured to execute a second product-sum operation based on the second-type data and the sampling result.

Abstract: A filter processing apparatus comprises: K arithmetic operation units configured to perform predetermined arithmetic operation processing parallelly; a data holding unit configured to hold a plurality of data values; a coefficient holding unit configured to hold a plurality of filter coefficients; a first pattern holding unit configured to hold a first pattern that selects K data values from the plurality of data values; a second pattern holding unit configured to hold a second pattern that selects one filter coefficient from the plurality of filter coefficients; and a control unit configured to sequentially input the K data values to the K arithmetic operation units with reference to the first pattern and sequentially input the one common filter coefficient to the K arithmetic operation units with reference to the second pattern.

Abstract: There is provided with a convolution operation apparatus. A first product-sum calculator includes a plurality of first multipliers, a plurality of first accumulators, a first data supplier which supplies first data to the plurality of first multipliers, and a second data supplier which supplies a plurality of second data to the plurality of first multipliers. A second product-sum calculator includes a plurality of second multipliers, a plurality of second accumulators, a third data supplier which supplies third data to the plurality of second multipliers, and a fourth data supplier which receives and holds an output from each of the plurality of first accumulators and supply the outputs as fourth data to a corresponding one of the plurality of second multipliers.

Abstract: To allow arithmetic processing using a plurality of processing nodes to be executed with a smaller memory size, an arithmetic processing apparatus for executing processing using a hierarchical type network formed by the plurality of processing nodes, comprises: a storage unit configured to store a parameter used by each of the plurality of processing nodes for arithmetic processing and a calculation result of the arithmetic processing in each of the plurality of processing nodes; and a buffer control unit configured to switch, based on a configuration of the hierarchical type network, a buffer system of the parameter and the calculation result in the storage unit in at least one layer of the hierarchical type network.

Abstract: A plurality of random number sequences are generated using a plurality of random number seeds stored in a memory, and a plurality of base vectors are generated based on the plurality of random number sequences. A transformation source vector is transformed into a lower-dimensional vector by performing random projection for the transformation source vector using the plurality of generated base vectors.

Abstract: There is provided a mirror device for a vehicle, including: a support body that is fixed to a vehicle body side and supports a mirror of the vehicle; and a covering body that covers an outer periphery of the support body, wherein the covering body includes: a first covering body, mounting of which to the support body by a linear movement is constrained, the mounting of the first covering body to the support body including turning of the first covering body relative to the support body, and a second covering body that is combined with the first covering body.

Abstract: A data processing apparatus includes a storage unit configured to store reference data of a filter operation and coefficient data of filters, a plurality of operators configured to parallelly perform the filter operation on the reference data and the coefficient data of the filters, a first supply unit configured to supply reference data transferred from the storage unit to the plurality of operators, a second supply unit configured to supply coefficient data of a first and second filters transferred from the storage unit to the plurality of operators, and a control unit configured to control the second supply unit to supply the coefficient data of the first filter to a first operator, and supply the coefficient data of the second filter to a second operator.

Abstract: A first arithmetic apparatus performs an arithmetic process, out of a plurality of arithmetic processes in identification processing on an input image, in which the parameter amount that is used is small compared to an amount of data to which the parameters are applied. A second arithmetic apparatus performs an arithmetic process, out of the plurality of arithmetic processes, in which the parameter amount that is used is large compared to an amount of data to which the parameters are applied. The second arithmetic apparatus can use a larger memory capacity memory than the first arithmetic apparatus.

Abstract: There is provided with a convolution operation apparatus. A first product-sum calculator includes a plurality of first multipliers, a plurality of first accumulators, a first data supplier which supplies first data to the plurality of first multipliers, and a second data supplier which supplies a plurality of second data to the plurality of first multipliers. A second product-sum calculator includes a plurality of second multipliers, a plurality of second accumulators, a third data supplier which supplies third data to the plurality of second multipliers, and a fourth data supplier which receives and holds an output from each of the plurality of first accumulators and supply the outputs as fourth data to a corresponding one of the plurality of second multipliers.

Abstract: An information processing apparatus and method enables a pattern discriminator to learn. The apparatus establishes a branch structure appropriate for learning a discriminator having the branch structure without increasing processing time. The apparatus includes a preliminary learning unit to learn a preliminary discriminator for a respective one of a plurality of combinations of variations in variation categories in a discrimination target pattern. A branch structure determination unit is provided to perform discrimination processing using the preliminary discriminator and to determine a branch structure of a main discriminator based on a result of the discrimination processing. A main learning unit is included to learn the main discriminator based on the branch structure.

Abstract: A plurality of random number sequences are generated using a plurality of random number seeds stored in a memory, and a plurality of base vectors are generated based on the plurality of random number sequences. A transformation source vector is transformed into a lower-dimensional vector by performing random projection for the transformation source vector using the plurality of generated base vectors.

Abstract: In a convolution operation circuit, a first and a second shift registers provide data to a first and a second inputs of a plurality of multipliers, a first and a second storage units store data to be supplied to the first and the second shift registers, a plurality of cumulative adders accumulate output from the plurality of multipliers, a third storage unit latches output from the plurality of cumulative adders at predetermined timing, a fourth storage unit stores data to be stored in the first and the second storage units and data output from the third storage unit, and a control unit sets data stored in the first and the second storage units to the first and the second shift registers at predetermined timing, causes the first and the second shift registers to perform shift operations in synchronization with an operation of the cumulative adder.