Patents by Inventor Masamichi Mukai

Masamichi Mukai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9569305
    Abstract: A memory device includes: a memory including a first port and a second port that are accessible; an error check and correct encoding circuit that applies an error check and correct code to data and writes them into the first port of the memory; an error check and correct decoding circuit that receives input of the data and the error check and correct code read from the first port of the memory, and corrects the inputted data in case of an error in the inputted data is detected based on the inputted error check and correct code; and a control circuit that writes the corrected data and the error check and correct code into the second port of the memory in case of the error is detected and a current access address and a previous access address to the first port of the memory are different.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: February 14, 2017
    Assignee: Socionext Inc.
    Inventor: Masamichi Mukai
  • Publication number: 20150178159
    Abstract: A memory device includes: a memory including a first port and a second port that are accessible; an error check and correct encoding circuit that applies an error check and correct code to data and writes them into the first port of the memory; an error check and correct decoding circuit that receives input of the data and the error check and correct code read from the first port of the memory, and corrects the inputted data in case of an error in the inputted data is detected based on the inputted error check and correct code; and a control circuit that writes the corrected data and the error check and correct code into the second port of the memory in case of the error is detected and a current access address and a previous access address to the first port of the memory are different.
    Type: Application
    Filed: October 9, 2014
    Publication date: June 25, 2015
    Inventor: Masamichi MUKAI
  • Patent number: 6310818
    Abstract: The present invention provides a method for changing output data of a multiple-port semiconductor memory device, including memory cells, first and second bit lines connected to the memory cells, a first port connected to the first bit line to write data to the memory cells, a second port connected to the second bit line to output data stored in the memory cells, and a data read circuit connected to the second bit line and having a latch circuit for holding the data of one of the memory cells. The method of the present invention detects a change in the stored data in the memory cell associated with the data held by the latch circuit based on a potential at the second bit line, and changes the data held by the latch circuit when a change in the stored data is detected.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: October 30, 2001
    Assignee: Fujitsu Limited
    Inventor: Masamichi Mukai