Patents by Inventor Masamitsu Ikumo

Masamitsu Ikumo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10008432
    Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: June 26, 2018
    Assignee: SOCIONEXT INC.
    Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
  • Publication number: 20170047266
    Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.
    Type: Application
    Filed: July 21, 2016
    Publication date: February 16, 2017
    Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
  • Patent number: 8420522
    Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: April 16, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
  • Publication number: 20120129335
    Abstract: A method of manufacturing a semiconductor device including the following steps: forming an insulator layer over a first conductor over a semiconductor substrate; forming a barrier layer to coat the surface of the insulator layer; forming a second conductor over the barrier layer; melting the second conductor in an atmosphere containing either hydrogen or carboxylic acid in a condition that the surface of the insulator layer over the first conductor is coated with the barrier layer; and removing the barrier layer partially from the surface of the insulator layer with the second conductor as a mask.
    Type: Application
    Filed: July 28, 2011
    Publication date: May 24, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Masamitsu IKUMO, Hiroyuki Yoda, Yoshito Akutagawa
  • Patent number: 8093148
    Abstract: A method for manufacturing semiconductor device which includes forming a first metal film over an electrode pad disposed on a substrate, forming a second metal film on the first metal film, forming a first oxide film on a surface of the first metal film and a second oxide film on a surface of the second metal film by oxidizing the surfaces of the first metal film and the second metal film, removing the first oxide film, and melting the second metal film after removing the first oxide film.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: January 10, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Yutaka Makino, Masamitsu Ikumo, Hiroyuki Yoda
  • Patent number: 7915538
    Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: March 29, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20100081269
    Abstract: A method for manufacturing semiconductor device which includes forming a first metal film over an electrode pad disposed on a substrate, forming a second metal film on the first metal film, forming a first oxide film on a surface of the first metal film and a second oxide film on a surface of the second metal film by oxidizing the surfaces of the first metal film and the second metal film, removing the first oxide film, and melting the second metal film after removing the first oxide film.
    Type: Application
    Filed: September 30, 2009
    Publication date: April 1, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Yutaka Makino, Masamitsu Ikumo, Hiroyuki Yoda
  • Publication number: 20080293234
    Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.
    Type: Application
    Filed: June 25, 2008
    Publication date: November 27, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
  • Patent number: 7417326
    Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: August 26, 2008
    Assignee: Fujitsu Limited
    Inventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
  • Publication number: 20080124529
    Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.
    Type: Application
    Filed: January 29, 2008
    Publication date: May 29, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Masamitsu IKUMO, Tadahiro OKAMOTO, Eiji WATANABE
  • Patent number: 7355124
    Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: April 8, 2008
    Assignee: Fujitsu Limited
    Inventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
  • Patent number: 7247950
    Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: July 24, 2007
    Assignee: Fujitsu Limited
    Inventors: Tetsuya Fujisawa, Masamitsu Ikumo
  • Publication number: 20070138635
    Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.
    Type: Application
    Filed: March 14, 2006
    Publication date: June 21, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
  • Patent number: 7233076
    Abstract: A semiconductor device has antenna pads and a testing pad formed on the substrate. An insulating resin layer containing a filler covers the testing pad, and bumps are provided on the antenna pads. Specific data in the semiconductor device are inhibited from being read out or rewritten, by the provision of the insulating resin layer containing a filler.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: June 19, 2007
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Masamitsu Ikumo
  • Publication number: 20060258045
    Abstract: A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X1. Each of the protruding electrodes has a height X3 and is formed on a barrier metal base of diameter X2 coupled to an electrode arranged on the semiconductor substrate so as to satisfy the relations (X½)?X2?(3*X¼) and (X½)?X3?(3*X¼).
    Type: Application
    Filed: April 27, 2006
    Publication date: November 16, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Masahiko Ishiguri, Hirohisa Matsuki, Hiroyuki Yoda, Tadahiro Okamoto, Masamitsu Ikumo, Shuichi Chiba
  • Publication number: 20060219429
    Abstract: A multilayer wiring board comprises a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.
    Type: Application
    Filed: July 14, 2005
    Publication date: October 5, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
  • Publication number: 20060214296
    Abstract: In a semiconductor-device manufacturing method, a metal bump is formed through a plurality of barrier metal layers on an opening which is selectively formed in an insulation layer covering a semiconductor substrate. The metal bump is formed on the plurality of barrier metal layers. A first etching process that selectively removes a lower metal layer among the plurality of barrier metal layers is performed by using an upper metal layer among the plurality of barrier metal layers as a mask. A reflow process that covers an end face of the lower metal layer with a metal that forms the metal bump is performed. After the lower metal layer end face is covered with the metal, a second etching process that removes a barrier metal residue on a surface of the insulation layer in a circumference of the metal bump is performed.
    Type: Application
    Filed: June 21, 2005
    Publication date: September 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro Okamoto, Masamitsu Ikumo, Eiji Watanabe
  • Publication number: 20060175686
    Abstract: A semiconductor device fabrication method comprises the steps of: (a) forming a pad electrode on the semiconductor device; (b) coating the surface of the semiconductor device with an organic dielectric film so as to expose the center portion of the pad electrode; (c) treating the exposed surface of the pad electrode by dry etching; and (d) removing an altered layer produced in the organic dielectric film due to the dry etching for the surface treatment, using an oxygen-free dry process.
    Type: Application
    Filed: June 13, 2005
    Publication date: August 10, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Murata, Masamitsu Ikumo, Eiji Watanabe
  • Patent number: 7064436
    Abstract: A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X1. Each of the protruding electrodes has a height X3 and is formed on a barrier metal base of diameter X2 coupled to an electrode arranged on the semiconductor substrate so as to satisfy the relations (X1/2)?X2?(3*X1/4) and (X1/2)?X3?(3*X1/4).
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: June 20, 2006
    Assignee: Fujitsu Limited
    Inventors: Masahiko Ishiguri, Hirohisa Matsuki, Hiroyuki Yoda, Tadahiro Okamoto, Masamitsu Ikumo, Shuichi Chiba
  • Publication number: 20060012017
    Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.
    Type: Application
    Filed: November 5, 2004
    Publication date: January 19, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tetsuya Fujisawa, Masamitsu Ikumo