Patents by Inventor Masamitsu Ikumo
Masamitsu Ikumo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10008432Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.Type: GrantFiled: July 21, 2016Date of Patent: June 26, 2018Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
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Publication number: 20170047266Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.Type: ApplicationFiled: July 21, 2016Publication date: February 16, 2017Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
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Patent number: 8420522Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.Type: GrantFiled: June 25, 2008Date of Patent: April 16, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
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Publication number: 20120129335Abstract: A method of manufacturing a semiconductor device including the following steps: forming an insulator layer over a first conductor over a semiconductor substrate; forming a barrier layer to coat the surface of the insulator layer; forming a second conductor over the barrier layer; melting the second conductor in an atmosphere containing either hydrogen or carboxylic acid in a condition that the surface of the insulator layer over the first conductor is coated with the barrier layer; and removing the barrier layer partially from the surface of the insulator layer with the second conductor as a mask.Type: ApplicationFiled: July 28, 2011Publication date: May 24, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Masamitsu IKUMO, Hiroyuki Yoda, Yoshito Akutagawa
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Patent number: 8093148Abstract: A method for manufacturing semiconductor device which includes forming a first metal film over an electrode pad disposed on a substrate, forming a second metal film on the first metal film, forming a first oxide film on a surface of the first metal film and a second oxide film on a surface of the second metal film by oxidizing the surfaces of the first metal film and the second metal film, removing the first oxide film, and melting the second metal film after removing the first oxide film.Type: GrantFiled: September 30, 2009Date of Patent: January 10, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Yutaka Makino, Masamitsu Ikumo, Hiroyuki Yoda
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Patent number: 7915538Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.Type: GrantFiled: January 29, 2008Date of Patent: March 29, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20100081269Abstract: A method for manufacturing semiconductor device which includes forming a first metal film over an electrode pad disposed on a substrate, forming a second metal film on the first metal film, forming a first oxide film on a surface of the first metal film and a second oxide film on a surface of the second metal film by oxidizing the surfaces of the first metal film and the second metal film, removing the first oxide film, and melting the second metal film after removing the first oxide film.Type: ApplicationFiled: September 30, 2009Publication date: April 1, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Yutaka Makino, Masamitsu Ikumo, Hiroyuki Yoda
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Publication number: 20080293234Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.Type: ApplicationFiled: June 25, 2008Publication date: November 27, 2008Applicant: FUJITSU LIMITEDInventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
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Patent number: 7417326Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.Type: GrantFiled: March 14, 2006Date of Patent: August 26, 2008Assignee: Fujitsu LimitedInventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
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Publication number: 20080124529Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.Type: ApplicationFiled: January 29, 2008Publication date: May 29, 2008Applicant: FUJITSU LIMITEDInventors: Masamitsu IKUMO, Tadahiro OKAMOTO, Eiji WATANABE
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Patent number: 7355124Abstract: A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.Type: GrantFiled: July 14, 2005Date of Patent: April 8, 2008Assignee: Fujitsu LimitedInventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
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Patent number: 7247950Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.Type: GrantFiled: November 5, 2004Date of Patent: July 24, 2007Assignee: Fujitsu LimitedInventors: Tetsuya Fujisawa, Masamitsu Ikumo
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Publication number: 20070138635Abstract: A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.Type: ApplicationFiled: March 14, 2006Publication date: June 21, 2007Applicant: FUJITSU LIMITEDInventors: Masamitsu Ikumo, Hiroyuki Yoda, Eiji Watanabe
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Patent number: 7233076Abstract: A semiconductor device has antenna pads and a testing pad formed on the substrate. An insulating resin layer containing a filler covers the testing pad, and bumps are provided on the antenna pads. Specific data in the semiconductor device are inhibited from being read out or rewritten, by the provision of the insulating resin layer containing a filler.Type: GrantFiled: August 24, 2004Date of Patent: June 19, 2007Assignee: Fujitsu LimitedInventors: Hirohisa Matsuki, Masamitsu Ikumo
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Publication number: 20060258045Abstract: A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X1. Each of the protruding electrodes has a height X3 and is formed on a barrier metal base of diameter X2 coupled to an electrode arranged on the semiconductor substrate so as to satisfy the relations (X½)?X2?(3*X¼) and (X½)?X3?(3*X¼).Type: ApplicationFiled: April 27, 2006Publication date: November 16, 2006Applicant: FUJITSU LIMITEDInventors: Masahiko Ishiguri, Hirohisa Matsuki, Hiroyuki Yoda, Tadahiro Okamoto, Masamitsu Ikumo, Shuichi Chiba
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Publication number: 20060219429Abstract: A multilayer wiring board comprises a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.Type: ApplicationFiled: July 14, 2005Publication date: October 5, 2006Applicant: FUJITSU LIMITEDInventors: Masamitsu Ikumo, Tadahiro Okamoto, Eiji Watanabe
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Publication number: 20060214296Abstract: In a semiconductor-device manufacturing method, a metal bump is formed through a plurality of barrier metal layers on an opening which is selectively formed in an insulation layer covering a semiconductor substrate. The metal bump is formed on the plurality of barrier metal layers. A first etching process that selectively removes a lower metal layer among the plurality of barrier metal layers is performed by using an upper metal layer among the plurality of barrier metal layers as a mask. A reflow process that covers an end face of the lower metal layer with a metal that forms the metal bump is performed. After the lower metal layer end face is covered with the metal, a second etching process that removes a barrier metal residue on a surface of the insulation layer in a circumference of the metal bump is performed.Type: ApplicationFiled: June 21, 2005Publication date: September 28, 2006Applicant: FUJITSU LIMITEDInventors: Tadahiro Okamoto, Masamitsu Ikumo, Eiji Watanabe
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Publication number: 20060175686Abstract: A semiconductor device fabrication method comprises the steps of: (a) forming a pad electrode on the semiconductor device; (b) coating the surface of the semiconductor device with an organic dielectric film so as to expose the center portion of the pad electrode; (c) treating the exposed surface of the pad electrode by dry etching; and (d) removing an altered layer produced in the organic dielectric film due to the dry etching for the surface treatment, using an oxygen-free dry process.Type: ApplicationFiled: June 13, 2005Publication date: August 10, 2006Applicant: FUJITSU LIMITEDInventors: Koichi Murata, Masamitsu Ikumo, Eiji Watanabe
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Patent number: 7064436Abstract: A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X1. Each of the protruding electrodes has a height X3 and is formed on a barrier metal base of diameter X2 coupled to an electrode arranged on the semiconductor substrate so as to satisfy the relations (X1/2)?X2?(3*X1/4) and (X1/2)?X3?(3*X1/4).Type: GrantFiled: November 23, 2004Date of Patent: June 20, 2006Assignee: Fujitsu LimitedInventors: Masahiko Ishiguri, Hirohisa Matsuki, Hiroyuki Yoda, Tadahiro Okamoto, Masamitsu Ikumo, Shuichi Chiba
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Publication number: 20060012017Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.Type: ApplicationFiled: November 5, 2004Publication date: January 19, 2006Applicant: FUJITSU LIMITEDInventors: Tetsuya Fujisawa, Masamitsu Ikumo