Abstract: A cavity elongated in one direction is formed in a protective film covering the conductive pattern of the topmost conductive layer of a multilayer wiring substrate. The cavity exposes part of the conductive pattern. A first via-conductor extends downward from the conductive pattern of the topmost conductive layer at least until that of a second conductive layer. Second via-conductors extend downward from the conductive pattern of the second or third conductive layer at least until that of a conductive layer one below. As viewed from above, the first via-conductor and the cavity partially overlap each other. At least two second via-conductors are disposed to sandwich the cavity therebetween. The difference between the smallest gap between the cavity and the second via-conductor at one side and that between the cavity and the second via-conductor at the other side is smaller than the smallest gap between the cavity and the second via-conductors.

Abstract: The present technology relates to a display apparatus, a display control method, a portable terminal apparatus, and a program capable of representing various states of an apparatus in a limited region. A television receiver includes a display unit that displays a predetermined image, a communication unit that performs communication of image data with another image display apparatus, an indicator unit that is disposed at at least a part of surroundings of the display unit and includes an indicator which is turned on with predetermined luminance, and a control unit that turns on the indicator so as to correspond to a transmission operation of the image data in another image display apparatus. The present invention is applicable to, for example, a display apparatus such as a television receiver.

Abstract: A semiconductor element includes a semiconductor substrate, first and second amplifiers provided on the semiconductor substrate and adjacently provided in a first direction, a first reference potential bump provided on a main surface of the semiconductor substrate, and connecting the first amplifier and a reference potential, a second reference potential bump provided on the main surface, being adjacent to the first reference potential bump in the first direction, and connecting the second amplifier and a reference potential, and a rectangular bump provided on the main surface, provided between the first and second reference potential bumps in a plan view, and formed such that a second width in a second direction orthogonal to the first direction is larger than a first width in the first direction. The second width is larger than a width of at least one of the first and second reference potential bumps in the second direction.

Abstract: A semiconductor device includes two cell rows, each of which is formed of a plurality of transistor cells aligned in parallel to each other. Each of the plurality of transistor cells includes a collector region, a base region, and an emitter region that are disposed above a substrate. A plurality of collector extended wiring lines are each connected to the collector region of a corresponding one of the plurality of transistor cells and are extended in a direction intersecting an alignment direction of the plurality of transistor cells. A collector integrated wiring line connects the plurality of collector extended wiring lines to each other. A collector intermediate integrated wiring line that is disposed between the two cell rows in plan view connects the plurality of collector extended wring lines extended from the plurality of transistor cells that belong to one of the two cell rows to each other.

Abstract: The present disclosure relates to an information processing apparatus and an information processing method as well as a program that make it possible to control, by a partition provided on a boundary between two spaces, a visual shielding property and an auditory shielding property of a first space to a person in a second space in an interlocking relationship with each other in response to a distance between the person in the second space and the partition. A distance between the partition, which partitions the first space and the second space, and a person in the second space is measured, and transmittance of the partition and magnitude of output of audio in the first space to the second space are controlled in response to the measured distance. The present disclosure can be applied to a control apparatus for a partition section.

Abstract: A semiconductor package includes a module substrate having opposite top and bottom surfaces, a semiconductor chip provided with bumps and mounted on the top surface of the module substrate via the bumps, and a metal member having a top portion disposed at a level higher than the semiconductor chip with reference to the top surface of the module substrate and including the semiconductor chip in plan view and a side portion extending from the top portion toward the module substrate. The module substrate includes a first metal film disposed on or in at least one of the bottom surface and an internal layer of the module substrate. The first metal film is electrically connected to the bumps and reaches a side surface of the module substrate. The side portion is thermally coupled to the first metal film at the side surface of the module substrate.

Abstract: An information processing apparatus includes a connection unit, a processing execution unit, a setting unit, and a controller. The connection unit is capable of connecting input apparatuses that output operation information for executing an operation for an image displayed on a screen. The processing execution unit is capable of executing processing corresponding to the operation information on the image. The setting unit sets one of the input apparatuses as a main input apparatus, and sets the other input apparatuses as secondary input apparatuses. The controller performs control such that execution of the processing for the image by the processing execution unit based on the operation information from the input apparatus set as the main input apparatus is validated, and execution of the processing for the image by the processing execution unit based on the operation information from the input apparatuses set as the secondary input apparatuses is invalidated.

Abstract: A cavity elongated in one direction is formed in a protective film covering the conductive pattern of the topmost conductive layer of a multilayer wiring substrate. The cavity exposes part of the conductive pattern. A first via-conductor extends downward from the conductive pattern of the topmost conductive layer at least until that of a second conductive layer. Second via-conductors extend downward from the conductive pattern of the second or third conductive layer at least until that of a conductive layer one below. As viewed from above, the first via-conductor and the cavity partially overlap each other. At least two second via-conductors are disposed to sandwich the cavity therebetween. The difference between the smallest gap between the cavity and the second via-conductor at one side and that between the cavity and the second via-conductor at the other side is smaller than the smallest gap between the cavity and the second via-conductors.

Abstract: A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

Abstract: The present technology relates to a display device, a display control method, and a program that enable various states of the device to be expressed in a limited region. A television receiver set includes an indicator unit disposed at least in a part of a periphery of a display unit on which a predetermined image is displayed and including an indicator configured to be lit at a predetermined luminance, and a display control unit configured to perform control such that the predetermined image displayed on the display unit is associated with lighting of the indicator. The present invention can be applied to a display device such as a television receiver set.

Abstract: A power amplifier including a first transistor for amplifying and outputting a radio frequency signal, a second transistor, a third transistor for supplying a bias current, a first voltage supply circuit for supplying a lower voltage to a base of the third transistor as a temperature of a first diode is higher. The third transistor and the first transistor, or the third transistor and the second transistor, are disposed without another electronic element interposed therebetween. The third transistor is disposed such that a distance between the third transistor and the first transistor is smaller than a distance between the first voltage supply circuit and the first transistor, or a distance between the third transistor and the second transistor is smaller than a distance between the first voltage supply circuit and the second transistor.

Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

Abstract: A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

Abstract: An amplifier IC mounted on a multilayer board includes input, output, and common terminals. The multilayer board includes common, input, and output terminals on board side. These terminals are connected to the corresponding terminals on device side via bumps. On the lower surface of the multilayer board, a lower surface common terminal is arranged at a location overlapping the common terminal in plan view. First, second, and third via conductors are sequentially arranged toward the lower surface common terminal from the common terminal. An input via conductor is connected to the input terminal on board side. In plan view, the area of the first common via conductor is larger than any one of the areas of the second and third common via conductors and the input via conductor. In plan view, the area of bump of the common terminal is larger than the area of bump of the input terminal.

Abstract: Provided is an information processing apparatus including an operation detection unit configured to detect a user's operation, and a display control unit configured to display content in a part including a middle of a display screen and display thumbnails corresponding to content belonging to one category in one direction along one side of the display screen in a region located separately from the middle of the display screen. The display control unit moves the displayed thumbnails in a vertical direction with respect to the one direction according to an operation which is detected by the operation detection unit and is an operation of switching the one category to which the content corresponding to the displayed thumbnails belongs.

Abstract: A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current by subjecting the first signal to detection. The bias adjustment circuit controls the bias current such that a first current extracted from the bias circuit depends on a magnitude of the first signal.

Abstract: A semiconductor chip includes a plurality of transistor rows. Corresponding to the plurality of transistor rows, a first bump connected to a collector of the transistor is arranged, and a second bump connected to an emitter is arranged. The transistor rows are arranged along sides of a convex polygon. A first land and a second land provided in a circuit board are connected to the first bump and the second bump, respectively. A first impedance conversion circuit connects the first land and the signal output terminal. A plurality of transistors in the transistor row are grouped into a plurality of groups, and the first impedance conversion circuit includes a reactance element arranged for each of the groups.

Abstract: An information processing apparatus according to an embodiment of the present technology includes a projection controller and a mode controller. The projection controller controls projection of first information and projection of second information that is classified as information of which a type is different from a type of the first information. The mode controller is capable of performing switching between a first projection mode and a second projection mode, the first projection mode being a projection mode in which the first information and the second information are projected onto a projection-target object, the second projection mode being a projection mode in which the first information is projected onto the projection-target object, and the second information is projected onto a region outside of the projection-target object.

Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current to be supplied by the bias circuit by subjecting the first signal to detection. The bias adjustment circuit controls the bias current to be supplied to the base of the second transistor by drawing, from the bias circuit, a current of a magnitude corresponding to a magnitude of the first signal. The current increases as the magnitude of the first signal increases.