Patents by Inventor Masao Kumura

Masao Kumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120217526
    Abstract: The chip LED includes a plurality of semiconductor chips at least one of which is a light-emitting element; a recess formed on the packaging substrate having a rear-side metallic layer on the rear-side thereof, and a metallic layer formed on the bottom surface and inner wall surface of the recess; the light-emitting element being die-bonded to the metallic layer formed on the bottom surface of the recess and being wire-bonded to a wiring pattern deposited on the surface of the packaging substrate; and the metallic layer formed on the bottom surface of the recess being electrically conducted to the rear-side metallic layer formed on the rear side of the packaging substrate.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 30, 2012
    Applicant: E&E Japan Co., Ltd.
    Inventor: Masao KUMURA
  • Patent number: 7897989
    Abstract: The invention relates to a light emitter, such as an LED sealed with a resin, in particular, an LED wherein irregularities in a surface of a sealing resin can be formed through a simpler process in order to improve the light output efficiency of the LED. The LED is an LED wherein a liquid sealing resin is mixed with a solid transparent resin different from the sealing resin in specific gravity and subsequently the mixture is injected into a package into which an LED chip is integrated and then cured, thereby sealing the chip, characterized in that the solid transparent resin is fixed to the sealing resin to be partially naked to the sealing-resin-side surface of the LED through which light from the LED chip is emitted to the outside, and be partially embedded in the sealing resin, thereby being projected into the form of convexes. This LED is used for an LED displayer, an LCD backlight source, a lighting device or the like.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: March 1, 2011
    Assignee: E&E Japan Co., Ltd.
    Inventor: Masao Kumura
  • Publication number: 20100289048
    Abstract: The invention relates to a light emitter, such as an LED sealed with a resin, in particular, an LED wherein irregularities in a surface of a sealing resin can be formed through a simpler process in order to improve the light output efficiency of the LED. The LED is an LED wherein a liquid sealing resin is mixed with a solid transparent resin different from the sealing resin in specific gravity and subsequently the mixture is injected into a package into which an LED chip is integrated and then cured, thereby sealing the chip, characterized in that the solid transparent resin is fixed to the sealing resin to be partially naked to the sealing-resin-side surface of the LED through which light from the LED chip is emitted to the outside, and be partially embedded in the sealing resin, thereby being projected into the form of convexes. This LED is used for an LED displayer, an LCD backlight source, a lighting device or the like.
    Type: Application
    Filed: November 21, 2007
    Publication date: November 18, 2010
    Applicant: E & E JAPAN CO., LTD.
    Inventor: Masao Kumura
  • Patent number: 4536786
    Abstract: Raised contacts included within a semiconductor chip are bonded to respective external leads through the use of a bonding tool. The raised contacts and/or the external leads are varied in a fashion depending on their locations on a semiconductor substrate so as to compensate for lack of uniformity of the surface temperature of the bonding tool.
    Type: Grant
    Filed: May 17, 1979
    Date of Patent: August 20, 1985
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
  • Patent number: 4300153
    Abstract: Electrodes are formed on one major surface of a semiconductor chip and electrically connected to lead electrodes carried by a support substrate. A cover plate is fixed to the opposing major surface of the semiconductor chip to determine one major surface of semiconductor device. Remaining surfaces of the semiconductor chip are encapsulated by a resin mold. The cover plate comprises a flexible glass cloth impregnated with half cured epoxy resin.
    Type: Grant
    Filed: September 25, 1980
    Date of Patent: November 10, 1981
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
  • Patent number: 4280132
    Abstract: Blocking members are provided for limiting mold spread over a desirable area while a semiconductor is molded. The blocking members are composed within a metallic layer together with metallic leads by photoetching techniques. The blocking members are positioned at four corners of an aperture in a predetermined pattern of generally radial fingers extending cantilever-wise inwardly beyond the periphery of the aperture. The semiconductor is adapted to engage bumps on the semiconductor to the metallic leads by wire bonding methods. Extended portions of the metallic leads may also function as the blocking members, with the metallic leads being positioned at the four corners of the aperture.
    Type: Grant
    Filed: October 15, 1979
    Date of Patent: July 21, 1981
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
  • Patent number: 4247590
    Abstract: A semiconductor wafer is supported by a supporting plate via adhesive in some steps of fabricating a semiconductor device. The supporting plate is a porous ceramic plate impregnated with or painted with resin such as epoxy resin, silicone resin and polyimide varnish. The porous ceramic supporting plate has a low thermal conductivity to ensure stable bonding operation.
    Type: Grant
    Filed: December 8, 1977
    Date of Patent: January 27, 1981
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Hayakawa, Takamichi Maeda, Teruo Horii, Masao Kumura, Yasunori Chikawa
  • Patent number: 4151543
    Abstract: A semiconductor device comprises an insulating substrate such as a film carrier having wiring patterns formed thereon, lead electrodes connected to the wiring patterns, and a semiconductor chip bonded to the lead electrodes. The surface of the lead electrodes, to which the semiconductor chip is bonded, is smooth as compared with that of the wiring patterns, thereby ensuring accurate operation of the semiconductor device.
    Type: Grant
    Filed: April 12, 1977
    Date of Patent: April 24, 1979
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura