Patents by Inventor Masao Sakuma

Masao Sakuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153680
    Abstract: Provided is a rare-earth anisotropic magnet powder capable of achieving high magnetic properties while reducing the usage of Nd and Pr. The present invention provides a rare-earth anisotropic magnet powder comprising magnetic particles that contain rare-earth elements, boron, and a transition metal element. The rare-earth elements include a first rare-earth element that comprises Ce and/or La and a second rare-earth element that comprises Nd and/or Pr. The rare-earth elements have a first ratio (R1/Rt) of 5% to 57%. The first ratio (R1/Rt) is a ratio of an amount (R1) of the first rare-earth element to a total amount (Rt) of the rare-earth elements in terms of the number of atoms. The first rare-earth element has a La ratio (La/R1) of 0% to 35%. The La ratio (La/R1) is a ratio of an amount of La to the amount (R1) of the first rare-earth element in terms of the number of atoms. The magnetic particles have a Ga content of 0.35 at % or less with respect to 100 at % as a whole.
    Type: Application
    Filed: March 3, 2022
    Publication date: May 9, 2024
    Applicants: AICHI STEEL CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Ryo SHIMBO, Masao YAMAZAKI, Noritsugu SAKUMA, Akihito KINOSHITA, Akira KATO, Tetsuya SHOJI
  • Patent number: 9548530
    Abstract: [Problem to be Solved] To provide an antenna which can be used in a wide band. [Solution] An antenna 10A includes a dielectric substrate 11, an unbalanced power supply member 12 having a non-power supply unit 23 and a power supply unit 24, a resonance conductor 13 having a connection area 26, a first resonance area 27 and a second resonance area 28, a grounding conductor 14 having a first ground area 32 and a second ground area 33, and a radiation conductor 15 having a first radiation area 37 and a second radiation area 38. At the antenna 10A, first to third radiation stepped portions 42a to 42c are formed at a first rear end portion 41 of the second radiation area 38, and first to third radiation stepped portions 44a to 44c are formed at a second rear end portion 43 of the second radiation area 38.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: January 17, 2017
    Assignees: NOISE LABORATORY CO., LTD., TOYOTA MOTOR CORPORATION
    Inventors: Takayuki Kubo, Takeshi Ishida, Toru Uno, Taro Yamasaki, Hisashi Morishita, Masao Sakuma, Akihiko Nojima, Hiroki Keino, Keigo Yuba
  • Publication number: 20150357706
    Abstract: [Problem to be Solved] To provide an antenna which can be used in a wide band. [Solution] An antenna 10A includes a dielectric substrate 11, an unbalanced power supply member 12 having a non-power supply unit 23 and a power supply unit 24, a resonance conductor 13 having a connection area 26, a first resonance area 27 and a second resonance area 28, a grounding conductor 14 having a first ground area 32 and a second ground area 33, and a radiation conductor 15 having a first radiation area 37 and a second radiation area 38. At the antenna 10A, first to third radiation stepped portions 42a to 42c are formed at a first rear end portion 41 of the second radiation area 38, and first to third radiation stepped portions 44a to 44c are formed at a second rear end portion 43 of the second radiation area 38.
    Type: Application
    Filed: January 23, 2014
    Publication date: December 10, 2015
    Inventors: Takayuki KUBO, Takeshi ISHIDA, Toru UNO, Taro YAMASAKI, Hisashi MORISHITA, Masao SAKUMA, Akihiko NOJIMA, Hiroki KEINO, Keigo YUBA
  • Patent number: 8994153
    Abstract: A semiconductor device (semiconductor module) includes a circuit board (module board) and a semiconductor element mounted on the circuit board. A shielding layer that blocks electromagnetic waves is disposed on the upper surface of the semiconductor element, and an antenna element is disposed over the shielding layer. The semiconductor element and the antenna element are electrically connected to each other by a connecting portion. This structure enables the semiconductor device to be reduced in size and to have both an electromagnetic-wave blocking function and an antenna function.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: March 31, 2015
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hirohisa Matsuki, Masao Sakuma
  • Publication number: 20140077347
    Abstract: The present invention provides a semiconductor device including: a semiconductor chip; a lead frame provided with a recessed portion on at least one of an upper surface or a lower surface thereof, and electrically coupled to the semiconductor chip; and a resin section that molds the semiconductor chip and the lead frame, and is provided with an opening above the recessed portion. By inserting a conductive pin (not shown) into the recessed portion through the opening, a plurality of semiconductor devices can be mechanically and electrically coupled to each other.
    Type: Application
    Filed: December 21, 2012
    Publication date: March 20, 2014
    Applicant: SPANSION LLC
    Inventors: Kouichi MEGHRO, Junichi KASAI, Masao SAKUMA
  • Patent number: 8614649
    Abstract: An antenna includes a dielectric substrate and an antenna element. The antenna element includes a power feeding element and a reference potential element. The power feeding element includes a first conductive layer formed over the dielectric substrate, the first conductive layer extending in a first direction and having a first length along the first direction. The reference potential element includes a second conductive layer formed over the dielectric substrate, the second conductive layer extending in a second direction opposed to the first direction from a second position, the second point being apart by a first distance from a first position on an end of the first conductive layer, and a third conductive layer formed over the dielectric substrate, the third conductive element extending from the second point in the first direction apart by a second distance from the first conductive layer and having a third length along the first direction.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: December 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Masao Sakuma
  • Patent number: 8508046
    Abstract: A circuit substrate is presented. The circuit substrate comprises internal terminal electrode 2; a substrate 1; a wiring layer 21 formed on a portion of the surface of the substrate and having one end thereof connected to the internal terminal electrode; an insulating film contacting as a surface with the wiring layer; and an external terminal electrode 9 connected to the other end of the wiring layer and used for connecting to the exterior. The angle of the cross-section of the wiring layer taken perpendicularly to the surface of the substrate in the edge portion that the wiring layer contains is 55° (55 degree) or less, and the wiring layer that contains multiple mutually independent columnar crystals extending perpendicularly in a direction different from the direction of the surface of the substrate.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: August 13, 2013
    Assignee: DISCO Corporation
    Inventors: Masao Sakuma, Kanji Otsuka
  • Publication number: 20130015564
    Abstract: A semiconductor device (semiconductor module) includes a circuit board (module board) and a semiconductor element mounted on the circuit board. A shielding layer that blocks electromagnetic waves is disposed on the upper surface of the semiconductor element, and an antenna element is disposed over the shielding layer. The semiconductor element and the antenna element are electrically connected to each other by a connecting portion. This structure enables the semiconductor device to be reduced in size and to have both an electromagnetic-wave blocking function and an antenna function.
    Type: Application
    Filed: June 12, 2012
    Publication date: January 17, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hirohisa Matsuki, Masao Sakuma
  • Publication number: 20120319914
    Abstract: An antenna that can be used in a wide band and can arbitrarily adjust the working frequency band to a higher or lower frequency band includes a resonant conductor tube located on the outside of a feeding section of an unbalanced feed member and covering the feeding section, a ground conductor tube located on the outside of a passive section of the unbalanced feed member and covering the passive section, and a connection conductor guide located between the conductor tubes and the unbalanced feed member. In the antenna, the conductor tubes and the unbalanced feed member are electrically fixed to the connection conductor guide via a fixing unit, and the feeding section of the unbalanced feed member has an exposed portion with a predetermined size, the exposed portion exposed from the resonant conductor tube outward in the length direction thereof.
    Type: Application
    Filed: March 11, 2011
    Publication date: December 20, 2012
    Inventor: Masao Sakuma
  • Publication number: 20120193799
    Abstract: A circuit substrate is presented. The circuit substrate comprises internal terminal electrode 2; a substrate 1; a wiring layer 21 formed on a portion of the surface of the substrate and having one end thereof connected to the internal terminal electrode; an insulating film contacting as a surface with the wiring layer; and an external terminal electrode 9 connected to the other end of the wiring layer and used for connecting to the exterior. The angle of the cross-section of the wiring layer taken perpendicularly to the surface of the substrate in the edge portion that the wiring layer contains is 55° (55 degree) or less, and the wiring layer that contains multiple mutually independent columnar crystals extending perpendicularly in a direction different from the direction of the surface of the substrate.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 2, 2012
    Applicant: SKLink Co., Ltd.
    Inventors: Masao SAKUMA, Kanji OTSUKA
  • Patent number: 8144061
    Abstract: An antenna device, including a radiating element having a feed portion and a floating conduction member, which is provided between the radiating element and a conduction board having a high-frequency signal source which generates high-frequency signals for supplying to the feed portion, and which is electrically floated.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: March 27, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Masao Sakuma
  • Patent number: 8026855
    Abstract: A feed element and a parasitic element are formed on the ends of a board. The feed element is formed on the surface of the board, and the parasitic element is formed on the back of the board. A circuit region of the board is mounted with a radio communication circuit. The feed element is connected with a signal line, and the parasitic element is connected with a GND line. A slit is provided between the feed element and the circuit region, and a slit is provided between the parasitic element and the circuit element.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: September 27, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masao Sakuma, Norikazu Ebisawa
  • Publication number: 20110025570
    Abstract: An antenna includes a dielectric substrate and an antenna element. The antenna element includes a power feeding element and a reference potential element. The power feeding element includes a first conductive layer formed over the dielectric substrate, the first conductive layer extending in a first direction and having a first length along the first direction. The reference potential element includes a second conductive layer formed over the dielectric substrate, the second conductive layer extending in a second direction opposed to the first direction from a second position, the second point being apart by a first distance from a first position on an end of the first conductive layer, and a third conductive layer formed over the dielectric substrate, the third conductive element extending from the second point in the first direction apart by a second distance from the first conductive layer and having a third length along the first direction.
    Type: Application
    Filed: July 23, 2010
    Publication date: February 3, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Masao SAKUMA
  • Publication number: 20100045560
    Abstract: An antenna includes a substrate made of a dielectric material, a first different dielectric constant region having a dielectric constant different from a dielectric constant of said substrate provided in said substrate, and a first antenna element provided on a front surface of said substrate.
    Type: Application
    Filed: July 30, 2009
    Publication date: February 25, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Masao SAKUMA, Yoshikazu OKA
  • Publication number: 20090273523
    Abstract: An antenna device, including a radiating element having a feed portion and a floating conduction member, which is provided between the radiating element and a conduction board having a high-frequency signal source which generates high-frequency signals for supplying to the feed portion, and which is electrically floated.
    Type: Application
    Filed: April 14, 2009
    Publication date: November 5, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Masao SAKUMA
  • Publication number: 20090058738
    Abstract: A feed element and a parasitic element are formed on the ends of a board. The feed element is formed on the surface of the board, and the parasitic element is formed on the back of the board. A circuit region of the board is mounted with a radio communication circuit. The feed element is connected with a signal line, and the parasitic element is connected with a GND line. A slit is provided between the feed element and the circuit region, and a slit is provided between the parasitic element and the circuit element.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Masao Sakuma, Norikazu Ebisawa
  • Patent number: 6881611
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Limited
    Inventors: Norio Fukasawa, Toshimi Kawahara, Muneharu Morioka, Mitsunada Osawa, Yasuhiro Shinma, Hirohisa Matsuki, Masanori Onodera, Junichi Kasai, Shigeyuki Maruyama, Masao Sakuma, Yoshimi Suzuki, Masashi Takenaka
  • Publication number: 20020030258
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Application
    Filed: January 23, 2001
    Publication date: March 14, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Norio Fukasawa, Toshimi Kawahara, Muneharu Morioka, Mitsunada Osawa, Yasuhiro Shinma, Hirohisa Matsuki, Masanori Onodera, Junichi Kasai, Shigeyuki Maruyama, Masao Sakuma, Yoshimi Suzuki, Masashi Takenaka
  • Publication number: 20010003049
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Application
    Filed: May 15, 1998
    Publication date: June 7, 2001
    Inventors: NORIO FUKASAWA, TOSHIMI KAWAHARA, MUNEHARU MORIOKA, MITSUNADA OSAWA, YASUHIRO SHINMA, HIROHISA MATSUKI, MASANORI ONODERA, JUNICHI KASAI, SHIGEYUKI MARUYAMA, MASAO SAKUMA, YOSHIMI SUZUKI, MASASHI TAKENAKA
  • Patent number: 6022759
    Abstract: A semiconductor device includes a semiconductor element, a semiconductor device base member having an element mounting portion on which the semiconductor element is mounted, external connection terminals provided on the semiconductor device base member and electrically connected to the semiconductor element, and a resin sealing the semiconductor element. The semiconductor device base member includes a base part and lead parts supported by the base part. The lead parts are electrically connected to the external connection terminals. The semiconductor device base member has bent portions in which the lead parts are located on outer sides of the semiconductor device base member. The bent portions are located in edge portions of the semiconductor device base member.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: February 8, 2000
    Assignees: Fujitsu Limited, Fujitsu Automation Limited
    Inventors: Masaaki Seki, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Lim Cheang Hai, Koki Otake, Susumu Abe, Junichi Kasai, Masao Sakuma, Yoshimi Suzuki, Yasuhiro Shinma