Patents by Inventor Masao Sekibata

Masao Sekibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4910094
    Abstract: A primary plated film is formed on the surface of underlayer metal. Next, the heating process is performed and diffusion layers of the underlayer metal and primary plated film are formed. A mechanical abrasion is performed to the surface of the primary plated film, thereby exposing the diffusion layers. Thereafter, a secondary plated film is formed on the exposed diffusion layers. With this multilayer plating method, even in the case of the dissimilar metals, a uniform multilayer plated film of a good adhesive property is derived.
    Type: Grant
    Filed: September 22, 1988
    Date of Patent: March 20, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Watanabe, Masao Sekibata
  • Patent number: 4765528
    Abstract: Before Au-plating onto the metallic surface of an electronic part, Ni-plating and then Co-plating are applied to form a primer coating for Au-plating. But in the steps of Ni and Co-platings, hydrogen gas produced during the plating is occluded into a plating layer. On the other hand, when a pellet connected onto an Au-plated metal, an Au-Si alloy is formed, but hydrogen gas in the plating layer remains as voids in the Au-Si alloy during a subsequent heating step of the electronic part, resulting in a serious defect. This invention of a plating method is characterized by annealing after Au-plating of an electronic part to eliminate the residual gas.
    Type: Grant
    Filed: August 12, 1986
    Date of Patent: August 23, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Masao Sekibata, Toshihiko Ohta, Osamu Miyazawa
  • Patent number: 4739125
    Abstract: An electric component part has its lead terminals bent in thickness directions in a middle section thereof at least two positions so that a step section virtually in parallel to the bottom of a circuit substrate is formed with the intention of absorbing the external force applied to the part by chaging the shape of the lead terminals. Increase in the part layout area due to the formation of the horizontal step section can be avoided, when necessary, by shifting the terminal lead out position on the component part inward thereby to minimize the jetty dimensions.
    Type: Grant
    Filed: September 15, 1986
    Date of Patent: April 19, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Watanabe, Fumiyuki Kobayashi, Masao Sekibata, Shigeo Kuroda, Akio Yasukawa, Shigejiro Sekine
  • Patent number: 4630095
    Abstract: A packaged semiconductor device structure includes a semiconductor chip with an organic material covering thereon. The semiconductor chip is placed in a package and hermetically sealed with a low melting point glass. The organic covering serve to suppress undesirable influence on the semiconductor chip by .alpha.-rays which may be radiated from the package, and a getter material is placed in the package for decreasing undesirable gases in the package which may be emitted by the organic covering during the sealing process.
    Type: Grant
    Filed: June 29, 1984
    Date of Patent: December 16, 1986
    Assignee: VLSI Technology Research Association
    Inventors: Kanji Otsuka, Kunizou Sahara, Masao Sekibata, Kazumichi Mitsusada, Katsumi Ogiue
  • Patent number: 4580713
    Abstract: A method for bonding an aluminum wire to a minute pad of an electronic circuit by an ultrasonic bonding technique. An anodized aluminum wire having its surface subjected to insulating coating is used. The bonding is effected such that this anodized aluminum wire is pressed against the pad by means of a wedge and, while a load is being thereby applied to the wire, ultrasonic vibrations are caused in the wedge. The alumite is exfoliated from the base material by application of the load and ultrasonic energy to the wire, and this base material and pad are bonded together at this exfoliated portion.
    Type: Grant
    Filed: September 23, 1983
    Date of Patent: April 8, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Masao Sekibata, Kanji Otsuka, Yoshiyuki Ohzawa
  • Patent number: 4541003
    Abstract: The present invention relates to a semiconductor device having a semiconductor element which is sealed by a ceramic package, wherein a shielding member is provided near it from upper surface of the semiconductor element to shield the alpha-particles radiated from the package.
    Type: Grant
    Filed: June 14, 1982
    Date of Patent: September 10, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Kanji Otsuka, Kazumichi Mitsusada, Masao Sekibata, Shinji Ohnishi