Patents by Inventor Masaru Doi
Masaru Doi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7190174Abstract: A method for calibrating a timing clock is provided. The method includes the steps of calibrating a shift amount of an edge of a shift clock by using a period of the timing clock as a reference by detecting an edge of the timing clock more than once while changing the shift amount of the edge of the shift clock; shifting and generating the edge of the shift clock by a predetermined shift amount by the calibrated shift clock generating section; and calibrating a required delay amount for delaying the timing clock by time corresponding to the predetermined shift amount by detecting the edge of the shift clock shifted by the predetermined amount while changing a delay amount of the timing clock.Type: GrantFiled: July 6, 2006Date of Patent: March 13, 2007Assignee: Advantest CorporationInventor: Masaru Doi
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Publication number: 20060284621Abstract: A method for calibrating a timing clock is provided. The method includes: calibrating a shift amount of an edge of a shift clock by using a period of the timing clock as a reference by detecting an edge of the timing clock more than once while changing the shift amount of the edge of the shift clock; shifting and generating the edge of the shift clock by a predetermined shift amount by the calibrated shift clock generating section; and calibrating a required delay amount for delaying the timing clock by time corresponding to the predetermined shift amount by detecting the edge of the shift clock shifted by the predetermined amount while changing a delay amount of the timing clock.Type: ApplicationFiled: July 6, 2006Publication date: December 21, 2006Applicant: Advantest CorporationInventor: Masaru Doi
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Patent number: 7010729Abstract: A timing generator includes a reference clock generating unit for outputting a reference clock at a predetermined time interval, a first variable delay circuit unit for receiving the reference clock and outputting a first delay signal which results from delaying the reference clock, a second variable delay circuit unit for receiving the reference clock and outputting a second delay signal which results from delaying the reference clock, a delay control unit for controlling delay amounts of the first and second variable delay circuit units, and a timing generating unit for generating the timing signal based on the first and second delay signals, wherein the first and second delay control units increase or decrease the delay amounts of the first and second variable delay circuit units to be increased or decreased whenever the reference clock generating unit generates the reference clock.Type: GrantFiled: May 10, 2004Date of Patent: March 7, 2006Assignee: Advantest CorporationInventors: Masaru Doi, Shinya Sato
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Publication number: 20060041772Abstract: There is provided a timing generator generating a timing signal of a predetermined period. The timing generator includes a set/reset latch, a set unit supplying the set signal, and a reset unit supplying the reset signal, in which the set unit includes: a first variable delay circuit that delays a given reference clock to output a first set signal; a second variable delay circuit that delays the given reference clock to output a second set signal having a phase different from the first set signal; an OR circuit that computes a logical sum of the first set signal and the second set signal to generate the set signal; and a third variable delay circuit that delays the set signal output from the OR circuit to adjust a skew between the set signal and the reset signal.Type: ApplicationFiled: August 4, 2005Publication date: February 23, 2006Applicant: Advantest CorporationInventor: Masaru Doi
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Patent number: 6990613Abstract: A test apparatus for testing an electronic device includes a pattern generating unit for generating a test pattern to test the electronic device, a reference clock generating unit for generating a reference clock, a timing generator for generating a timing signal, an output signal sampling circuit for sampling the output signal outputted by the electronic device in response to the test pattern at the timing based on the timing signal generated by the timing generator, wherein the timing generator includes a variable delay circuit unit for receiving, delaying and outputting the reference clock, and a delay control unit for controlling the delay amount of the variable delay circuit unit, and the delay control unit controls the delay amount based on the basic timing data and the variable delay amount which is smaller than the basic timing data.Type: GrantFiled: May 6, 2004Date of Patent: January 24, 2006Assignee: Advantest CorporationInventors: Masaru Doi, Shinya Sato
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Publication number: 20050287319Abstract: A slurry for molding an article is provided wherein a source powder including at least one of a ceramic powder and a metal powder is dispersed, introduced into a forming mold, cured in the forming mold to form the molded article, and at least a part of the forming mold is degraded or dissolved in releasing the molded article from the forming mold. The major components of the slurry include the source powder, a dispersion medium and a gellifying agent, wherein the dispersion medium and the gellifying agent each contain an organic compound having a reactive functional group such that the slurry is cured by a reaction between the organic compound in the dispersion medium and the organic compound in the gellifying agent.Type: ApplicationFiled: August 12, 2005Publication date: December 29, 2005Applicant: NGK Insulators, Ltd.Inventors: Sugio Miyazawa, Shinzo Hayashi, Masaru Doi
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Publication number: 20050271179Abstract: There is provided a multi-strobe generation apparatus for generating a multi-strobe having a plurality of strobes. The multi-strobe generation apparatus includes a shift clock generating section capable of outputting a shift clock that is what a reference clock is divided at timing corresponding to timing at which each strobe is to be generated, a strobe generating section for generating the multi-strobe corresponding to each leading or trailing edge of the reference clock and an adjustment section for adjusting timing at which the strobe generating section generates each strobe based on the shift clock.Type: ApplicationFiled: April 4, 2005Publication date: December 8, 2005Applicant: Advantest CorporationInventors: Takashi Hasegawa, Masaru Doi, Shinya Sato
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Publication number: 20050259556Abstract: There is provided a detection apparatus including a transition point detecting unit operable to receive the output signal to detect the point of transition, a timing comparing unit operable to detect the signal level of the output signal in front of or behind the point of transition in the output signal, and a correction unit operable to compensate the timing of the point of transition detected from the transition point detecting unit based on the signal level of the output signal detected from the timing comparing unit.Type: ApplicationFiled: July 28, 2005Publication date: November 24, 2005Applicant: Advantest CorporationInventor: Masaru Doi
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Publication number: 20050249001Abstract: A testing apparatus for performing a setup testing or a hold testing on a device under test (“DUT”) storing a given data signal according to a given clock signal is provided, wherein the testing apparatus includes a timing generating unit for generating sequentially a plurality of timing signals having different timings during the setup testing or the hold testing on the basis of a fist offset value given before starting the setup testing or the hold testing; a pattern generating unit for generating the clock signal and the data signal; a pattern formatting unit for shifting the phase of the data signal with respect to the clock signal sequentially according to the timing signals sequentially generated and providing the DUT with the clock signal and the phase-shifted data signal sequentially; and a determining module for acquiring a setup time or a hold time of the DUT on the basis of storage data which are the data signals stored by the DUT.Type: ApplicationFiled: April 1, 2005Publication date: November 10, 2005Applicant: Advantest CorporationInventors: Kouichi Tanaka, Masaru Doi, Shinya Sato
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Patent number: 6953503Abstract: A slurry for molding an article is provided wherein a source powder including at least one of a ceramic powder and a metal powder is dispersed, introduced into a forming mold, cured in the forming mold to form the molded article, and at least a part of the forming mold is degraded or dissolved in releasing the molded article from the forming mold. The major components of the slurry include the source powder, a dispersion medium and a gellifying agent, wherein the dispersion medium and the gellifying agent each contain an organic compound having a reactive functional group such that the slurry is cured by a reaction between the organic compound in the dispersion medium and the organic compound in the gellifying agent.Type: GrantFiled: April 9, 2002Date of Patent: October 11, 2005Assignee: NGK Insulators, Ltd.Inventors: Sugio Miyazawa, Shinzo Hayashi, Masaru Doi
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Publication number: 20040251914Abstract: A test apparatus for testing an electronic device includes a pattern generating unit for generating a test pattern to test the electronic device, a reference clock generating unit for generating a reference clock, a timing generator for generating a timing signal, an output signal sampling circuit for sampling the output signal outputted by the electronic device in response to the test pattern at the timing based on the timing signal generated by the timing generator, wherein the timing generator includes a variable delay circuit unit for receiving, delaying and outputting the reference clock, and a delay control unit for controlling the delay amount of the variable delay circuit unit, and the delay control unit controls the delay amount based on the basic timing data and the variable delay amount which is smaller than the basic timing data.Type: ApplicationFiled: May 6, 2004Publication date: December 16, 2004Inventors: Masaru Doi, Shinya Sato
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Publication number: 20040208048Abstract: A timing generator includes a reference clock generating unit for outputting a reference clock at a predetermined time interval, a first variable delay circuit unit for receiving the reference clock and outputting a first delay signal which results from delaying the reference clock, a second variable delay circuit unit for receiving the reference clock and outputting a second delay signal which results from delaying the reference clock, a delay control unit for controlling delay amounts of the first and second variable delay circuit units, and a timing generating unit for generating the timing signal based on the first and second delay signals, wherein the first and second delay control units increase or decrease the delay amounts of the first and second variable delay circuit units to be increased or decreased whenever the reference clock generating unit generates the reference clock.Type: ApplicationFiled: May 10, 2004Publication date: October 21, 2004Inventors: Masaru Doi, Shinya Sato
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Publication number: 20040122620Abstract: A phase difference between a timing of rising or falling of the data read from a semiconductor device to be test and a timing of rising or falling of a reference clock outputted synchronized with the data is measured by operating sampling with strobe pulses configured with multi-phase pulses given the phase difference by a small amount in regard to the timing of the data and the timing of the reference clock. In addition, a glitch of the data is detected, and the quality of the semiconductor device to be tested is judged based on the phase difference and/or the glitch.Type: ApplicationFiled: December 10, 2003Publication date: June 24, 2004Inventors: Masaru Doi, Takeo Miura
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Publication number: 20030190275Abstract: The inner shape of the body part in a hollow ceramic molded article constituting a precursor of a discharge vessel is precisely controlled so as to make a large improvement in the function of a discharge vessel formed by baking the hollow ceramic molded article.Type: ApplicationFiled: December 18, 2002Publication date: October 9, 2003Inventors: Sugio Miyazawa, Shinzo Hayashi, Masaru Doi
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Patent number: 4772967Abstract: A magnetic recording apparatus of a helical scanning system comprises a rotary cylinder (13), recording heads (A and B) and an erase head (10) attached to slightly project from a rotating surface (13a) of the cylinder (13). The rotary erase head (10) has a gap (4) comprising a ferrite core half (1) and a Sendust film (3) formed on a ferrite core half (2) opposed to the ferrite core half (1) and having a larger saturation magnetic flux density. In addition, the recording heads (A and B) and the rotary erase head (10) are attached on the rotary cylinder (13) so that an end (P1) located forward with respect to the tape travelling direction (11) of the Sendust film (3) may trace the backward side with respect to the tape travelling direction (11), apart by a distance which is a half of the gap length of the rotary erase head (10), as compared with a forward end (Q) of a recorded track pattern ( 15a) formed on a tape (14) by the recording head (A) scanning immediately after erasing by the rotary erase head (10).Type: GrantFiled: November 6, 1986Date of Patent: September 20, 1988Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroyuki Okuda, Masaru Doi, Yoshiaki Shimizu, Takao Yamano, Kazuo Ino, Koso Ishihara