Patents by Inventor Masaru Nomura
Masaru Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11128232Abstract: A driving device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit and a controller. The input unit inputs an AC in put. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a start timing such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the start timing of a power supply period becomes a second timing, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.Type: GrantFiled: July 25, 2018Date of Patent: September 21, 2021Assignee: NIDEC CORPORATIONInventors: Kotaro Kataoka, Hiroshi Iwata, Takamitsu Suzuki, Masaru Nomura
-
Publication number: 20200212818Abstract: A driving device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit and a controller. The input unit inputs an AC in put. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a start timing such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the start timing of a power supply period becomes a second timing, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.Type: ApplicationFiled: July 25, 2018Publication date: July 2, 2020Applicant: NIDEC CORPORATIONInventors: Kotaro KATAOKA, Hiroshi IWATA, Takamitsu SUZUKI, Masaru NOMURA
-
Patent number: 10671233Abstract: A file management apparatus includes the following elements: a representative image storage device storing representative image data of each of a plurality of content files in association with a creation time of the content file; a rendering unit rendering the representative image data at a position corresponding to the creation time with a calendar continuous over days, months, and years serving as a background; a display state maintaining unit maintaining, as a display state, a time-axis range of the calendar being displayed and a position thereof; an operation receiving unit receiving a change operation to change the display state, the change operation commonly being a scrolling operation in a time-series direction in any time-axis range; and a controller controlling, in response to the change operation, the rendering means to render the representative image data on the calendar on the basis of the display state.Type: GrantFiled: January 18, 2013Date of Patent: June 2, 2020Assignee: Sony CorporationInventors: Hiroki Masuda, Eriko Matsumura, Kensaku Ishizuka, Masakazu Hayashi, Masaru Nomura
-
Publication number: 20200027755Abstract: A temporary-fixing substrate includes a fixing face for adhering and temporary-fixing a plurality of electronic parts with a resin mold and a bottom face on the opposite side of the fixing face. The temporary-fixing substrate is composed of a translucent ceramic material, scratches are distributed on the fixing face, and intergranular boundaries and polished surfaces of crystal grains forming the translucent ceramic material are exposed to the bottom face. The density of scratches on the bottom face is lower than the density of scratches on the fixing face.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Masaru NOMURA, Sugio MIYAZAWA
-
Publication number: 20200027771Abstract: A temporary-fixing substrate includes a fixing face for adhering and temporary fixing a plurality of electronic parts by a resin mold on the fixing face and a bottom face on the opposite side of the fixing face. The temporary-fixing substrate is warped so that the fixing face is of a convex shape curved upwardly from the temporary-fixing substrate viewed in a cross section of the temporary-fixing substrate. The following formula (1) is satisfied, provided that W is assigned to a width of the fixing face viewed in the cross section of the temporary-fixing substrate, and provided that W3/4 is assigned to a width of a region in which heights of the fixing face with respect to a reference plane of warping of the temporary-fixing substrate are ¾ or larger of the maximum value of the heights of the fixing face with respect to the reference plane. 0.45?W3/4/W?0.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Masaru NOMURA, Sugio MIYAZAWA
-
Patent number: 9998019Abstract: A DC-DC converter includes a transformer, a switching circuit provided on the primary side of the transformer, and a rectifier circuit provided on the secondary side of the transformer. The rectifier circuit includes a first rectifier part that is serially connected body of a first transistor and a second transistor having a first electrode connected to a second electrode of the first transistor. The first and second transistors each include a parasitic diode connected forward between the second and first electrode, and the withstanding voltage between the first and second electrodes of the first transistor is higher than the withstanding voltage between the first and second electrodes of the second transistor.Type: GrantFiled: September 30, 2013Date of Patent: June 12, 2018Assignee: SHARP KABUSHIKI KAISHAInventors: Kenji Komiya, Takeshi Shiomi, Masaru Nomura, Akihide Shibata, Hiroshi Iwata
-
Patent number: 9793793Abstract: A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.Type: GrantFiled: June 9, 2016Date of Patent: October 17, 2017Assignee: SHARP KABUSHIKI KAISHAInventors: Kohtaroh Kataoka, Masaru Nomura, Shuji Wakaiki, Hiroki Igarashi, Akihide Shibata, Hiroshi Iwata, Takeshi Shiomi
-
Patent number: 9698710Abstract: A solar energy utilization system includes a solar panel, a motor driven by an inverter circuit functioning as a motor drive circuit with power output by the solar panel, a solar output voltage monitor functioning as a monitor that monitors an input or an output of the solar panel and also functioning as a monitor that monitors an input or an output of the inverter circuit, and a controller. The controller has a control mode in which the inverter circuit is controlled such that an output voltage of the solar panel is maintained at a voltage higher than a maximum power point voltage. In this control mode, the controller performs the control such that a rotation speed of the motor is changed repeatedly at predetermined timings.Type: GrantFiled: April 7, 2014Date of Patent: July 4, 2017Assignee: Sharp Kabushiki KaishaInventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
-
Patent number: 9660513Abstract: A control circuit is driven by a driving voltage (VOC) generated by a generator circuit, and outputs a control signal. A drive circuit is driven by a driving voltage (VOD) generated by another generator circuit, and turns a switching element inside a switching circuit on or off by supplying, to the switching circuit, a drive signal based on the control signal. During activation of a switching device, a voltage generation controller detects a voltage value of the output voltage (VOC) of the generator circuit, and allows activation of the other generator circuit after verifying that the detected voltage value is at or above a designated threshold.Type: GrantFiled: March 24, 2014Date of Patent: May 23, 2017Assignee: Sharp Kabushiki KaishaInventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
-
Patent number: 9613063Abstract: When the user selects one or more thumbnail images G and one uploading destination from an image list screen GW, an image selection tray PT showing the thumbnail images G and an uploading screen AW corresponding to a web browser are displayed. When the user selects the thumbnail images G from the image selection tray PT, the image paths GP corresponding to the selected thumbnail images G are acquired. In this manner, the image files can be uploaded only by requiring the user to paste the acquired image paths in image path input sections GR on the uploading screen AW. Accordingly, the user can upload image files to an optional uploading destination by simple operation.Type: GrantFiled: July 7, 2008Date of Patent: April 4, 2017Assignee: Sony CorporationInventors: Masaru Nomura, Yoshinari Higuchi
-
Patent number: 9590617Abstract: A semiconductor device includes a high breakdown voltage, high Gm first transistor and a low breakdown voltage, low Gm second transistor connected in series between first and second nodes, and a low breakdown voltage, high Gm third transistor connected to the second transistor in parallel. When the second transistor is turned on, the first transistor turns on, and furthermore, when the third transistor is turned on, an electrically conducting state is established between the first and second nodes. The second, low breakdown voltage transistor is turned on to turn on the first, high breakdown voltage transistor, and a turn-on time with only limited variation can be achieved.Type: GrantFiled: April 5, 2012Date of Patent: March 7, 2017Assignee: SHARP KABUSHIKI KAISHAInventors: Kenji Komiya, Shuji Wakaiki, Kohtaroh Kataoka, Masaru Nomura, Yoshiji Ohta, Hiroshi Iwata
-
Publication number: 20170012546Abstract: A DC-DC converter includes a transformer, a switching circuit provided on the primary side of the transformer, and a rectifier circuit provided on the secondary side of the transformer. The rectifier circuit includes a first rectifier part that is serially connected body of a first transistor and a second transistor having a first electrode connected to a second electrode of the first transistor. The first and second transistors each include a parasitic diode connected forward between the second and first electrode, and the withstanding voltage between the first and second electrodes of the first transistor is higher than the withstanding voltage between the first and second electrodes of the second transistor.Type: ApplicationFiled: September 30, 2013Publication date: January 12, 2017Applicant: SHARP KABUSHIKI KAISHAInventors: Kenji KOMIYA, Takeshi SHIOMI, Masaru NOMURA, Akihide SHIBATA, Hiroshi IWATA
-
Publication number: 20160380531Abstract: A power factor correction circuit includes: a coil and MOSFETs that boost an input voltage to generate a boosted voltage; a first capacitor having one end connected to a first output terminal, and the other end connected to an intermediate node; and a second capacitor having one end connected to the intermediate node, and the other end connected to a second output terminal. In a first operation mode, the boosted vol tage is applied to the two ends of the first capacitor when a positive voltage is input, and applied to the two ends of the second capacitor when a negative voltage is input. In a second operation mode, the boosted voltage is applied to two ends of the first and second capacitors connected in series. Thus, there is provided a power factor correction circuit which has a high efficiency and is compatible with an input voltage in a broad range.Type: ApplicationFiled: June 9, 2016Publication date: December 29, 2016Applicant: Sharp Kabushiki KaishaInventors: Kohtaroh KATAOKA, Masaru NOMURA, Shuji WAKAIKI, Hiroki IGARASHI, Akihide SHIBATA, Hiroshi IWATA, Takeshi SHIOMI
-
Publication number: 20160172960Abstract: A control circuit is driven by a driving voltage (VOC) generated by a generator circuit, and outputs a control signal. A drive circuit is driven by a driving voltage (VOD) generated by another generator circuit, and turns a switching element inside a switching circuit on or off by supplying, to the switching circuit, a drive signal based on the control signal. During activation of a switching device, a voltage generation controller detects a voltage value of the output voltage (VOC) of the generator circuit, and allows activation of the other generator circuit after verifying that the detected voltage value is at or above a designated threshold.Type: ApplicationFiled: March 24, 2014Publication date: June 16, 2016Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
-
Publication number: 20160164440Abstract: A solar energy utilization system includes a solar panel, a motor driven by an inverter circuit functioning as a motor drive circuit with power output by the solar panel, a solar output voltage monitor functioning as a monitor that monitors an input or an output of the solar panel and also functioning as a monitor that monitors an input or an output of the inverter circuit, and a controller. The controller has a control mode in which the inverter circuit is controlled such that an output voltage of the solar panel is maintained at a voltage higher than a maximum power point voltage. In this control mode, the controller performs the control such that a rotation speed of the motor is changed repeatedly at predetermined timings.Type: ApplicationFiled: April 7, 2014Publication date: June 9, 2016Inventors: Kohtaroh Kataoka, Masaru Nomura, Takeshi Shiomi, Shuji Wakaiki, Akihide Shibata, Hiroshi Iwata
-
Publication number: 20160096776Abstract: A window material for an ultraviolet light emitting device for emitting an ultraviolet light having a wavelength of 300 nm or less is mounted on at least an ultraviolet light emitting side of the ultraviolet light emitting device. The window material for an ultraviolet light emitting device contains a translucent alumina substrate, and a surface of the window material has an average grain diameter of 6 to 60 ?m.Type: ApplicationFiled: December 10, 2015Publication date: April 7, 2016Inventors: Masaru NOMURA, Tsuneaki OHASHI, Sugio MIYAZAWA
-
Patent number: 9293984Abstract: In order to offer a power supply circuit that can minimize the drop in efficiency by reducing losses during voltage conversion, in an improved-power factor circuit, a control circuit performs a step-up operation in which a control signal for turning on a first switching element (Tr1) and switching a second switching element (Tr2) is output, and a step-down operation in which a control signal for turning off the second switching element (Tr2) and switching the first switching element (Tr1) is output.Type: GrantFiled: August 29, 2012Date of Patent: March 22, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Kenji Komiya, Takeshi Shiomi, Yoshifumi Yaoi, Masaru Nomura, Kohichiroh Adachi, Yoshiji Ohta, Hiroshi Iwata
-
Patent number: 9261259Abstract: A headlamp (1) that utilizes a laser beam includes a scattered-light emitting unit (21) that emits scattered light upon receipt of a laser beam deviated from a predetermined path through which the laser beam is to pass or a predetermined irradiation region that is to be irradiated by the laser beam.Type: GrantFiled: May 25, 2012Date of Patent: February 16, 2016Assignee: SHARP KABUSHIKI KAISHAInventors: Takeshi Shiomi, Masaru Nomura, Yoshiji Ohta, Hiroshi Iwata, Koji Takahashi, Katsuhiko Kishimoto
-
Patent number: 9214783Abstract: A light emitting device which includes at least one of a laser light source (1), wiring (9), a lens for excitation (2), a luminous body (4), a laser cut filter (6), a half parabolic mirror (5P), and a base (5h), in which a part of the wiring (9) is installed at a portion in which a breakage easily occurs due to at least one deformation of the laser light source (1), the lens for excitation (2), the luminous body (4), the laser cut filter (6), the half parabolic mirror (5P), and the base (5h), or a change in an installation position thereof.Type: GrantFiled: March 5, 2012Date of Patent: December 15, 2015Assignee: SHARP KABUSHIKI KAISHAInventors: Masaru Nomura, Yoshifumi Yaoi, Kohichiroh Adachi, Kohtaroh Kataoka, Takeshi Shiomi, Hiroshi Iwata, Yoshiji Ohta
-
Publication number: 20150349692Abstract: A solar energy utilization system includes a solar panel, a motor that is driven by solar output power, and a motor stall prevention device that prevents the motor during drive from stalling, and as the motor stall prevention device, any of following devices is selected: (a) a motor stall prevention device that limits solar output voltage to voltage higher than voltage at which the solar panel outputs maximum power at the point in time; (b) a motor stall prevention device that limits solar output voltage to voltage at which, when the output voltage is changed on a P-V curve, a change rate becomes negative; and (c) a motor stall prevention device that is configured by a capacitor which is connected in parallel to the solar panel and stores power generated by the solar panel.Type: ApplicationFiled: December 13, 2013Publication date: December 3, 2015Applicant: SHARP KABUSHIKI KAISHAInventors: Akihide SHIBATA, Kohtaroh KATAOKA, Shuji WAKAIKI, Masaru NOMURA, Takeshi SHIOMI, Hiroshi IWATA, Masashi IMADE, Akio MIYATA, Shinichi ABE