Patents by Inventor Masaru SHIRAKAMI

Masaru SHIRAKAMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9541981
    Abstract: A power circuit section generates a first logic power supply voltage and an analog power supply voltage to supply to a first power supply line and a second power supply line, respectively. A regulator steps the first logic power supply voltage down to generate a second logic power supply voltage and supplies the second logic power supply voltage to a third power supply line. A logic circuit controls A source line driving section and A gate line driving section in response to a decrease of a voltage of the first power supply line so that the charge stored in the display panel is discharged. A charge transporting path is configured to transport the charge from the second power supply line to a third power supply line in response to the decrease of the voltage of the first power supply line.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: January 10, 2017
    Assignee: Synaptics Japan GK
    Inventors: Masaru Shirakami, Teru Yoneyama
  • Publication number: 20150309550
    Abstract: A power circuit section generates a first logic power supply voltage and an analog power supply voltage to supply to a first power supply line and a second power supply line, respectively. A regulator steps the first logic power supply voltage down to generate a second logic power supply voltage and supplies the second logic power supply voltage to a third power supply line. A logic circuit controls A source line driving section and A gate line driving section in response to a decrease of a voltage of the first power supply line so that the charge stored in the display panel is discharged. A charge transporting path is configured to transport the charge from the second power supply line to a third power supply line in response to the decrease of the voltage of the first power supply line.
    Type: Application
    Filed: April 22, 2015
    Publication date: October 29, 2015
    Inventors: Masaru SHIRAKAMI, Teru YONEYAMA