Patents by Inventor Masashi Kijima
Masashi Kijima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9577654Abstract: In an example embodiment, an analog-digital converter includes digital-analog converter, a comparator, and a register. The digital-analog converter is configured to output a differential voltage between a reference voltage and a voltage of an analog signal. The comparator is configured to output a comparison signal corresponding to the differential voltage output by the digital-analog converter.Type: GrantFiled: December 21, 2015Date of Patent: February 21, 2017Assignee: Cypress Semiconductor CorporationInventors: Masashi Kijima, Satoru Mizuta, Tsutomu Tanii, Hiroyuki Matsunami
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Publication number: 20160373124Abstract: In an example embodiment, an analog-digital converter includes digital-analog converter, a comparator, and a register. The digital-analog converter is configured to output a differential voltage between a reference voltage and a voltage of an analog signal. The comparator is configured to output a comparison signal corresponding to the differential voltage output by the digital-analog converter.Type: ApplicationFiled: December 21, 2015Publication date: December 22, 2016Inventors: Masashi Kijima, Satoru Mizuta, Tsutomu Tanii, Hiroyuki Matsunami
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Patent number: 8957795Abstract: An analog-to-digital conversion device includes: an analog-to-digital converter that receives an analog voltage and converts the analog voltage into a digital value to output the converted digital value; and an offset correction unit that arithmetically operates an offset correction value based on a first digital value and a second digital value, the first digital value being to be output from the analog-to-digital converter by the analog-to-digital converter receiving a first analog voltage, the second digital value being to be output from the analog-to-digital converter by the analog-to-digital converter receiving a second analog voltage, the second analog voltage having a voltage value different from that of the first analog voltage, in which after the arithmetic operation of the offset correction value, the analog-to-digital converter outputs a digital value obtained by subtracting the offset correction value from the converted digital value.Type: GrantFiled: February 20, 2014Date of Patent: February 17, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Youji Kawano, Motoki Shimozono, Youichi Satou, Kazuhiro Konomoto, Satoru Mizuta, Masashi Kijima
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Publication number: 20140240151Abstract: An analog-to-digital conversion device includes: an analog-to-digital converter that receives an analog voltage and converts the analog voltage into a digital value to output the converted digital value; and an offset correction unit that arithmetically operates an offset correction value based on a first digital value and a second digital value, the first digital value being to be output from the analog-to-digital converter by the analog-to-digital converter receiving a first analog voltage, the second digital value being to be output from the analog-to-digital converter by the analog-to-digital converter receiving a second analog voltage, the second analog voltage having a voltage value different from that of the first analog voltage, in which after the arithmetic operation of the offset correction value, the analog-to-digital converter outputs a digital value obtained by subtracting the offset correction value from the converted digital value.Type: ApplicationFiled: February 20, 2014Publication date: August 28, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Youji KAWANO, Motoki SHIMOZONO, Youichi SATOU, Kazuhiro KONOMOTO, Satoru MIZUTA, Masashi KIJIMA
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Patent number: 8022855Abstract: An A/D converter includes a plurality of comparators that performs sampling of a plurality of reference voltages and analog input signals during a sampling time, and compares each of the plurality of reference voltages with each of the plurality of analog signals during a comparison time. The A/D converter detects bubbles in thermometer codes obtained from output signals of the plurality of comparators and adjusts a ratio of the sampling time and the comparison time of the plurality of comparators so as to reduce the bubbles.Type: GrantFiled: January 27, 2010Date of Patent: September 20, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Masashi Kijima
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Patent number: 7876253Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.Type: GrantFiled: May 21, 2010Date of Patent: January 25, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
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Publication number: 20100225512Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.Type: ApplicationFiled: May 21, 2010Publication date: September 9, 2010Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Yoshiaki SHIMIZU, Hisao SUZUKI, Kenji ITO, Masashi KIJIMA
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Publication number: 20100194620Abstract: An A/D converter includes a plurality of comparators that performs sampling of a plurality of reference voltages and analog input signals during a sampling time, and compares each of the plurality of reference voltages with each of the plurality of analog signals during a comparison time. The A/D converter detects bubbles in thermometer codes obtained from output signals of the plurality of comparators and adjusts a ratio of the sampling time and the comparison time of the plurality of comparators so as to reduce the bubbles.Type: ApplicationFiled: January 27, 2010Publication date: August 5, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Masashi KIJIMA
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Patent number: 7760125Abstract: An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.Type: GrantFiled: February 6, 2008Date of Patent: July 20, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
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Publication number: 20090015450Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.Type: ApplicationFiled: February 6, 2008Publication date: January 15, 2009Inventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
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Patent number: 7397407Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.Type: GrantFiled: March 9, 2006Date of Patent: July 8, 2008Assignee: Fujitsu LimitedInventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
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Publication number: 20060158362Abstract: A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.Type: ApplicationFiled: March 9, 2006Publication date: July 20, 2006Inventors: Yoshiaki Shimizu, Hisao Suzuki, Kenji Ito, Masashi Kijima
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Patent number: 6846580Abstract: An organic EL device employing polymer material includes a structure in which a luminous layer formed of a polymer indicated by is put between a lower electrode and an upper electrode. Where, in the above chemical formula, Ar1, Ar2 denote a allylene group respectively, R1, R2, R3, R4 denote a substituent respectively, and n denotes a copolymerization ratio. Accordingly, the flatness of the luminous layer can be improved and the solubility of the luminous layer constituent material can be enhanced.Type: GrantFiled: February 9, 2004Date of Patent: January 25, 2005Assignee: Fujitsu LimitedInventors: Kota Yoshikawa, Masashi Kijima, Hideki Shirakawa, Ikuo Kinoshita
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Publication number: 20040155577Abstract: An organic EL device employing polymer material includes a structure in which a luminous layer formed of a polymer indicated by 1Type: ApplicationFiled: February 9, 2004Publication date: August 12, 2004Applicant: Fujitsu LimitedInventors: Kota Yoshikawa, Masashi Kijima, Hideki Shirakawa, Ikuo Kinoshita
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Publication number: 20020001734Abstract: An organic EL device employing polymer material includes a structure in which a luminous layer formed of a polymer indicated by 1Type: ApplicationFiled: April 26, 2001Publication date: January 3, 2002Inventors: Kota Yoshikawa, Masashi Kijima, Hideki Shirakawa, Ikuo Kinoshita