Abstract: A method for washing a semiconductor manufacturing apparatus component, the method comprising: a first process of disposing a semiconductor manufacturing apparatus component, to which a nitride semiconductor adheres, in a component holding portion inside a reaction tank of a washing apparatus; a second process of introducing a halogen-containing gas from a gas introducing pipe into the reaction tank to remove the nitride semiconductor adhered to the semiconductor manufacturing apparatus component; a third process of trapping a reaction product generated by a reaction of the halogen-containing gas and the nitride semiconductor in a trapping unit; and a fourth process of discharging the reaction product trapped by the trapping unit from a gas discharging pipe to outside of the reaction tank.

Abstract: A semiconductor manufacturing apparatus component (101), to which a nitride semiconductor expressed by a general formula of AlxnyGa1-x-yN (provided that, x and y satisfy relationships of 0?x<1, 0?y<1, and 0?x+y<1) adheres, is disposed inside a washing apparatus (100) provided with a gas introducing pipe (104) and a gas discharging pipe (105). After the inside of the apparatus is set toa decompressed state, a halogen-containing gas is introduced from the gas introducing pipe (104) to set a pressure inside the apparatus to be equal to or more than 10 kPa and equal to or less than 90 kPa. Then, the halogen-containing gas is retained inside the apparatus to remove the nitride semiconductor adhered to the semiconductor manufacturing apparatus component (101).

Abstract: A vapor deposition apparatus includes a deposition chamber for carrying out a deposition of a film on a substrate, source gas tubes for supplying a source gas, a transfer unit for transferring the substrate in the interior of the deposition chamber so that the substrate is alternately situated in a state where the substrate is located in a deposition region that faces the gas discharge port for supplying the source gas and in a state where the substrate is located in other region except the deposition region, while the source gas is supplied from a gas discharge port of any one of the source gas tubes, and a supply tube for supplying a gas containing group-V element to the substrate S located in the other region.

Abstract: A vapor deposition apparatus (1) includes a deposition chamber (4) for carrying out a deposition of a film on a substrate, source gas tubes (21) and (31) for supplying a source gas, a transfer unit (5) for transferring the substrate in the interior of the deposition chamber (4) so that the substrate is alternately situated in a state where the substrate is located in a deposition region that faces the gas discharge port for supplying the source gas and in a state where the substrate is located in other region except the deposition region, while the source gas is supplied from a gas discharge port of any one of the source gas tubes (21) and (31), and a supply tube (7) for supplying a gas containing group-V element to the substrate S located in the other region.

Abstract: A semiconductor manufacturing apparatus component (101), to which a nitride semiconductor expressed by a general formula of AlxInyGa1-x-yN (provided that, x and y satisfy relationships of 0?x<1, 0?y<1, and 0?x+y<1) adheres, is disposed inside a washing apparatus (100) provided with a gas introducing pipe (104) and a gas discharging pipe (105). After the inside of the apparatus is set to a decompressed state, a halogen-containing gas is introduced from the gas introducing pipe (104) to set a pressure inside the apparatus to be equal to or more than 10 kPa and equal to or less than 90 kPa. Then, the halogen-containing gas is retained inside the apparatus to remove the nitride semiconductor adhered to the semiconductor manufacturing apparatus component (101).

Abstract: A dielectric film 4 made of a high dielectric material with a relative permittivity of 8 or more is laid between a field plate section 9 and a channel layer 2. Tantalum oxide (Ta2O5), for example, may be used as the high dielectric material.

Abstract: A field effect transistor includes a semiconductor substrate with a channel layer being formed on its surface, a source electrode and a drain electrode formed at a distance on said semiconductor substrate, and a gate electrode placed between the source electrode and the drain electrode and making a Schottky junction with the channel layer. The gate electrode is provided with an overhanging field plate section and between the field plate section and the channel layer, there is laid a dielectric film. When the relative permittivity and the film thickness of the dielectric film are denoted by ∈ and t (nm), respectively, the following condition is satisfied 5≦∈<8, and 100<t<350.

Abstract: A GaN crystal film having a mask patterned in a stripe for forming multiple growing areas on a sapphire substrate and coalesced GaN crystals covering the mask dividing the areas, grown from the neighboring growing areas, comprising defects where multiple dislocations along with the stripe are substantially aligned with the normal line of the substrate, in the crystal areas over the mask, and dislocations propagating in substantially parallel with the substrate surface while, in the vicinity of the areas where the crystals are coalesced over the mask, propagating substantially in the normal line of the substrate surface, and a manufacturing process therefor. According to this invention, there can be provided a GaN crystal film in which strain, defects and dislocations are reduced and which tends not to generate cracks.

Abstract: A field control electrode 9 is formed over an insulating film 6 on a channel layer 2, between a gate electrode 5 and a drain electrode 8. Tantalum oxide (Ta.sub.2 O.sub.5), for example, may be used as the material for the insulating film 6.

Abstract: There are provided on a substrate a block layer having an electron affinity smaller than that of the substrate, a p-type strained superlattice structure having no lattice relaxation and operating as a generation region of spin polarized electrons and a surface layer for accommodating a bending portion of the energy band. The superlattice structure is formed of a multilayer in which a strained well layer and a barrier layer are alternately laminated plural times. The strained well layer has a lattice constant greater than that of the substrate and a thickness equal to or less than a wavelength of electron wave, and the barrier layer has a conduction band lower in energy than that of the strained well layer and a thickness such that an electron in the conduction band can transmit based on tunnel effect. A difference in energy between the band for heavy holes and the band for light holes is further widened in the valence band of the superlattice structure due to compressive stress in the strained well layer.

Abstract: A method of image data interpolation for obtaining an interlaced image signal by utilizing an image signal of only one field. The method includes the steps of obtaining another field signal by directly utilizing a given field signal or by employing a mean value interpolation processing at a portion of an image where a luminance of the image does not change in the vertical direction, obtaining another field signal by employing the mean value interpolation processing at a portion where a luminance of an image changes singularly to the vertical directions, and obtaining another field signal by directly utilizing a given field signal at some point of a portion where a luminance of an image changes a number of times in the vertical direction.

Abstract: A color signal processing apparatus comprising a first delay circuit for delaying an input chroma signal; a second delay circuit for delaying an output of the first delay circuit; a plurality of gain control circuits for controlling the amplitudes of the input chroma signal and the outputs of the first and second delay circuits, respectively; and an operating circuit for operating the gain-controlled amplitudes of the input chroma signal and the outputs of the first and second delay circuits, wherein the phases of the outputs of the first and second delay circuits are matched with the phase of the input chroma signal.

Abstract: A recording and reproducing apparatus wherein the video signal is time base expanded and separated into two channels before being recorded with a two headed recorder on two separate channels of a magnetic medium and wherein during reproduction the two channels from the magnetic medium are supplied to a time base corrector which supplies an output to a channel mixing and time base compressor which converts the two channels into a single output signal. A burst generator inserts burst signals into the two channels before they are recorded.