Patents by Inventor Masashi Muto

Masashi Muto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7779333
    Abstract: There is provided a semiconductor device of which the circuit scale does not significantly increase even with an ECC function. A microcomputer having an internal flash memory inserts one weight in a sense amplifier activation signal only when an error detection signal is on the H level at a given time in a read cycle or when the error detection signal which was on the H level in a previous read cycle has shifted to the L level in a current read cycle. This allows the retrieval of output data signals after waiting till the output data signals through error correction are determined only when an error is contained in the output data signals.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: August 17, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Yasuhiko Taito, Masashi Muto, Eiji Sakuma, Tsukasa Oishi
  • Publication number: 20070226597
    Abstract: There is provided a semiconductor device of which the circuit scale does not significantly increase even with an ECC function. A microcomputer having an internal flash memory inserts one weight in a sense amplifier activation signal only when an error detection signal is on the H level at a given time in a read cycle or when the error detection signal which was on the H level in a previous read cycle has shifted to the L level in a current read cycle. This allows the retrieval of output data signals after waiting till the output data signals through error correction are determined only when an error is contained in the output data signals.
    Type: Application
    Filed: January 9, 2007
    Publication date: September 27, 2007
    Inventors: Yasuhiko Taito, Masashi Muto, Eiji Sakuma, Tsukasa Oishi