Patents by Inventor Masashi Shiratori

Masashi Shiratori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230308202
    Abstract: A frame synchronization apparatus according to an embodiment includes a reception unit, a frame memory, a time generation unit, a reception time acquisition unit, a timestamp acquisition unit, and a control unit. The reception unit is configured to receive packet data including video data and a timestamp. The frame memory is configured to store the packet data. The time generation unit is configured to generate a time based on a reference synchronization signal. The reception time acquisition unit is configured to acquire a reception time of packet data satisfying a condition based on the time. The timestamp acquisition unit is configured to acquire a timestamp from the packet data satisfying the condition. The control unit is configured to read packet data from the frame memory in accordance with a variation in a difference between the reception time and a time indicated by the timestamp.
    Type: Application
    Filed: May 2, 2023
    Publication date: September 28, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Infrastructure Systems & Solutions Corporation
    Inventors: Yukihiro SUGAWARA, Masashi SHIRATORI, Keita IWAMI
  • Patent number: 8218079
    Abstract: A stream generating apparatus includes an acquirer which acquires from an external source a reference signal synchronized with the video signal, a self-driven counter which has a first count mode in which the number of clocks in the frame period is counted in synchronization with a reference signal acquired by the acquirer thereby to generate and supply a first frame sync signal to the first and second signal processing units, and a second count mode in which the number of clocks in the frame period is counted independently not in synchronization with the reference signal thereby to generate and supply a second frame sync signal to the first and second signal processing units, and a controller which switches a count mode between either from the first count mode to the second count mode or from the second count mode to the first count mode based on predetermined conditions.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: July 10, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masashi Shiratori
  • Publication number: 20100202757
    Abstract: An apparatus for writing video data to a recording medium includes an input unit receiving video data including a first video part and a second video part, a writing unit writing the video data in the recording medium, an operator input unit provided with buttons and generating a first button signal in accordance with operator's operation of pressing ones of the buttons and a second button signal in accordance with operator's operation of pressing at least the other one of the buttons, and a controller generating first and second commands in response to the first and second button signals, respectively, and controls the writing unit in accordance with the first or second command.
    Type: Application
    Filed: February 4, 2010
    Publication date: August 12, 2010
    Inventor: Masashi SHIRATORI
  • Publication number: 20100074596
    Abstract: A video data processor and a video data processing method which uses hardware resources efficiently even when a plurality of processing occurs to video data are performed in parallel is provided. The video data read from a recording medium in playback processing, editing processing, duplication processing, and other process that may be accomplished upon video is outputted to either of two lines by distributor 171. The video data that is outputted is temporarily held by input buffer 172-1, and decoded by decoder 173-1, and outputted to frame buffer 174-1. Frame buffer 174-1 and 174-2 are divided into a plurality of holding areas and these holding areas are dynamically assigned according to processing of playback processing, editing processing, or other processing that may be accomplished upon video. Thereby, the holding areas in frame buffer 174-1 and 174-2 can be used efficiently.
    Type: Application
    Filed: August 27, 2009
    Publication date: March 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoko SATOH, Yoshiro Osaki, Toshiki Mori, Kenji Kimiyama, Kiyoshi Yamaguchi, Masashi Shiratori, Yasuyuki Ushio
  • Publication number: 20070058079
    Abstract: A stream generating apparatus includes an acquirer which acquires from an external source a reference signal synchronized with the video signal, a self-driven counter which has a first count mode in which the number of clocks in the frame period is counted in synchronization with a reference signal acquired by the acquirer thereby to generate and supply a first frame sync signal to the first and second signal processing units, and a second count mode in which the number of clocks in the frame period is counted independently not in synchronization with the reference signal thereby to generate and supply a second frame sync signal to the first and second signal processing units, and a controller which switches a count mode between either from the first count mode to the second count mode or from the second count mode to the first count mode based on predetermined conditions.
    Type: Application
    Filed: September 7, 2006
    Publication date: March 15, 2007
    Inventor: Masashi Shiratori