Abstract: A 36V electrical apparatus is mountable with both an 18V/36V switchable battery pack and an 18V battery pack. In the case where the 18V/36 V battery pack is connected to the 36V electrical apparatus, first switches are turned off and a second switch is turned on to connect the battery pack in series (36V output). In the case where the 18V battery pack is connected to the 36V electrical apparatus, the first switches are turned on and the second switch is turned off to generate an 18V output, thus making it possible to mount the 18V battery pack to the 36V electrical apparatus. Furthermore, the voltage of the mounted battery pack is determined by a microcomputer, and a motor is set to a star connection by switches in the case of 36V, and to a delta connection in the case of 18V.

Abstract: A twin-screw extruder is provided in which screws have different rotational speeds depending on the process of treating the raw material and in which degradation of the raw material is less likely to occur. Twin-screw extruder 1 has two screws 3, 5 that extend in parallel to each other. Each screw 3, 5 has cylindrical upstream screw 31 and downstream screw 35, wherein upstream screw 31 has shaft hole 315 that extends in longitudinal direction X and screw flight 316 on an outer circumferential surface thereof, and downstream screw 35 includes large diameter portion 353 having screw flight 357 on an outer circumferential surface thereof and small diameter shaft portion 351 that has a smaller diameter than large diameter portion 353, wherein small diameter shaft portion 351 of downstream screw 35 is inserted into shaft hole 315 of upstream screw 31. Upstream screw 31 and downstream screw 35 can be independently rotated.

Abstract: A twin-screw extruder is provided in which screws have different rotational speeds depending on the process of treating the raw material and in which degradation of the raw material is less likely to occur. Twin-screw extruder 1 has two screws 3, 5 that extend in parallel to each other. Each screw 3, 5 has cylindrical upstream screw 31 and downstream screw 35, wherein upstream screw 31 has shaft hole 315 that extends in longitudinal direction X and screw flight 316 on an outer circumferential surface thereof, and downstream screw 35 includes large diameter portion 353 having screw flight 357 on an outer circumferential surface thereof and small diameter shaft portion 351 that has a smaller diameter than large diameter portion 353, wherein small diameter shaft portion 351 of downstream screw 35 is inserted into shaft hole 315 of upstream screw 31. Upstream screw 31 and downstream screw 35 can be independently rotated.

Abstract: A field-effect transistor includes a source electrode, a drain electrode, a semiconductor structure including a channel provided between the source electrode and the drain electrode in a first direction. Gate main portions have a first gate main portion length in the first direction and a second gate main portion length in a second direction. Connection portions are alternatively connected to the gate main portions respectively in the second direction. Each of the connection portions has a first connection portion length in the first direction and a second connection portion length in the second direction. The first connection portion length is longer than the first gate main portion length. The second connection portion length is shorter than the second gate main portion length. An external connection section is to apply electric power to the gate electrode. A bypass electrode connects the external connection section to each of the connection portions.

Abstract: A field-effect transistor includes a source electrode, a drain electrode, a semiconductor structure including a channel provided between the source electrode and the drain electrode in a first direction. Gate main portions have a first gate main portion length in the first direction and a second gate main portion length in a second direction. Connection portions are alternatively connected to the gate main portions respectively in the second direction. Each of the connection portions has a first connection portion length in the first direction and a second connection portion length in the second direction. The first connection portion length is longer than the first gate main portion length. The second connection portion length is shorter than the second gate main portion length. An external connection section is to apply electric power to the gate electrode. A bypass electrode connects the external connection section to each of the connection portions.

Abstract: A field effect transistor includes a semiconductor stack including a channel provided on a border between a first nitride semiconductor and a second nitride semiconductor provided on the first nitride semiconductor in a stacking direction. A source electrode, a gate electrode, and a drain electrode are disposed on the semiconductor stack. The gate electrode is disposed between the source electrode and the drain electrode. At least one hole is provided to pass through the channel from the first nitride semiconductor to the second nitride semiconductor to provide channel paths from the gate electrode to the drain electrode. A minimum distance of the channel paths is longer than a minimum distance between the gate electrode and drain electrode viewed in the stacking direction. The insulating member is filled in the at least one hole and has a breakdown field strength higher than a breakdown field strength of the semiconductor stack.

Abstract: A field effect transistor includes a semiconductor stack including a channel provided on a border between a first nitride semiconductor and a second nitride semiconductor provided on the first nitride semiconductor in a stacking direction. A source electrode, a gate electrode, and a drain electrode are disposed on the semiconductor stack. The gate electrode is disposed between the source electrode and the drain electrode. At least one hole is provided to pass through the channel from the first nitride semiconductor to the second nitride semiconductor to provide channel paths from the gate electrode to the drain electrode. A minimum distance of the channel paths is longer than a minimum distance between the gate electrode and drain electrode viewed in the stacking direction. The insulating member is filled in the at least one hole and has a breakdown field strength higher than a breakdown field strength of the semiconductor stack.

Abstract: A field-effect transistor includes a plurality of unit elements, an insulating film, and a wiring. The plurality of unit elements include a semiconductor layer having a first surface, a plurality of drain electrodes, gate electrodes, and a source electrode. The source electrode is electrically continuously provided across the plurality of unit elements outside the gate electrodes on the first surface and has narrow parts between the gate electrodes which are spaced apart from each other and which belong to adjacent unit elements among the plurality of unit elements. The narrow parts have a width narrower than a width of other parts of the source electrode. The insulating film has openings provided on the source electrode. The insulating film covers the source electrode across the plurality of unit elements. The openings are arranged at the other parts of the source electrode on both sides of each of the narrow parts.

Abstract: The field-effect transistor comprising: a semiconductor laminated structure comprising a first layer of a first nitride semiconductor, a second layer of a second nitride semiconductor having a bandgap larger than that of the first nitride semiconductor, and a two-dimensional electron gas layer; a source electrode; a drain electrode; and a gate electrode disposed over the second layer, the gate electrode being adapted to control the flow of electrons passing through the two-dimensional electron gas layer; a third layer of a p-type nitride semiconductor containing p-type dopant between the gate electrode and the second layer; and a fourth layer of a nitride semiconductor between the third layer and the gate electrode, wherein the fourth layer is in contact with the gate electrode, and wherein the fourth layer is an undoped layer which has a larger bandgap than that of the third layer.

Abstract: A field-effect transistor includes a plurality of unit elements which include a semiconductor layer having a first surface, a plurality of gate electrodes, drain electrodes, and source electrodes. Each of the plurality of gate electrodes is provided to define a drain electrode formation region which is surrounded by each of the plurality of gate electrodes. Each of the source electrodes is disposed in a source electrode formation region surrounded by the plurality of gate electrodes of the plurality of unit elements which are adjacent to each other. A source-gate distance between the each of the source electrodes and the each of the plurality of gate electrodes of the plurality of unit elements is shorter than a drain-gate distance between each of the drain electrodes and the each of the plurality of gate electrodes. The source electrode formation region is smaller than the drain electrode formation region.

Abstract: A field-effect transistor includes a plurality of unit elements which include a semiconductor layer having a first surface, a plurality of gate electrodes, drain electrodes, and source electrodes. Each of the plurality of gate electrodes is provided to define a drain electrode formation region which is surrounded by each of the plurality of gate electrodes. Each of the source electrodes is disposed in a source electrode formation region surrounded by the plurality of gate electrodes of the plurality of unit elements which are adjacent to each other. A source-gate distance between the each of the source electrodes and the each of the plurality of gate electrodes of the plurality of unit elements is shorter than a drain-gate distance between each of the drain electrodes and the each of the plurality of gate electrodes. The source electrode formation region is smaller than the drain electrode formation region.

Abstract: A field-effect transistor includes a plurality of unit elements, an insulating film, and a wiring. The plurality of unit elements include a semiconductor layer having a first surface, a plurality of drain electrodes, gate electrodes, and a source electrode. The source electrode is electrically continuously provided across the plurality of unit elements outside the gate electrodes on the first surface and has narrow parts between the gate electrodes which are spaced apart from each other and which belong to adjacent unit elements among the plurality of unit elements. The narrow parts have a width narrower than a width of other parts of the source electrode. The insulating film has openings provided on the source electrode. The insulating film covers the source electrode across the plurality of unit elements. The openings are arranged at the other parts of the source electrode on both sides of each of the narrow parts.

Abstract: The field-effect transistor comprising: a semiconductor laminated structure comprising a first layer of a first nitride semiconductor, a second layer of a second nitride semiconductor having a bandgap larger than that of the first nitride semiconductor, and a two-dimensional electron gas layer; a source electrode; a drain electrode; and a gate electrode disposed over the second layer, the gate electrode being adapted to control the flow of electrons passing through the two-dimensional electron gas layer; a third layer of a p-type nitride semiconductor containing p-type dopant between the gate electrode and the second layer; and a fourth layer of a nitride semiconductor between the third layer and the gate electrode, wherein the fourth layer is in contact with the gate electrode, and wherein the fourth layer is an undoped layer which has a larger bandgap than that of the third layer.

Abstract: A field effect transistor including an i-type first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer and having a band gap energy higher in magnitude than that of the first semiconductor layer. The first semiconductor layer and second semiconductor layer are each made of a gallium nitride-based compound semiconductor layer. A gate electrode is formed on the second semiconductor layer and a second electrode is formed on the first semiconductor layer. Thus, the field effect transistor is constructed in such a manner as the first semiconductor layer and second semiconductor layer are interposed between the gate electrode and the second electrode. Thus field effect transistor is able to discharge the holes that are accumulated in the channel from the elemental structure and to improve the withstand voltage of the field effect transistor.

Abstract: An improved document reader is provided, including: a platen for an original document to be placed thereon; and a hold-down member capable of opening and closing relative to the platen and operative to press the original document against the platen so as to make the original document stationary when in a closed state, wherein: the hold-down member includes a plurality of pressing sections arranged adjacent to each other, the pressing sections having respective grips which, except the grip, are engageable with respective notches defined by the pressing sections, respectively.

Abstract: A field effect transistor includes an i-type first semiconductor layer and a second semiconductor layer that is formed on the first semiconductor layer and the band gap energy of that is higher in magnitude than that of the first semiconductor layer. The first semiconductor layer and second semiconductor layer are each made of a gallium nitride-based compound semiconductor layer. A gate electrode 36 is formed on the second semiconductor layer; and a second electrode 39 is formed on the first semiconductor layer. Thus, the field effect transistor is constructed in such a manner as the first semiconductor layer and second semiconductor layer are interposed between the gate electrode 36 and the second electrode 39. By constructing like this, it is possible to discharge the holes that are accumulated in the channel from the elemental structure and to improve the withstand voltage of the field effect transistor.

Abstract: A network system includes a plurality of printers and a digital copying machine interconnected through a data transmission line, detects a free space in an image memory of each printer, adds a user identification code to image data of a document read in an image reading section of the digital copying machine, and then sends the image data to a printer with the image memory having a sufficient free space so as to store the image data. With this structure, even if the digital copying machine does not have an image memory, it is possible to store the image data subjected to an image formation within the network and omit an image reading process when performing an image formation according to the same image data later. Moreover, with this structure, various processing can be executed on the image data by effectively using the functions of the respective apparatuses.

Abstract: An improved document reader is provided, including: a platen for an original document to be placed thereon; and a hold-down member capable of opening and closing relative to the platen and operative to press the original document against the platen so as to make the original document stationary when in a closed state, wherein: the hold-down member includes a plurality of pressing sections arranged adjacent to each other, the pressing sections having respective grips which, except the grip, are engageable with respective notches defined by the pressing sections, respectively.

Abstract: The present invention provides a printing apparatus equipped with inexpensive, scaled-down, lightweight recognition and setting functions. The printing apparatus is capable of setting desired modes of printing, adjustment, etc. by referring to a mode selection menu sheet, in which setting items, mode options for each setting item, and a plurality of marks specifying a mode are listed. A desired mode for each setting item may be set by operating selection keys in correspondence to the marks specifying the desired mode.