Patents by Inventor Masataka Minami

Masataka Minami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9891116
    Abstract: To provide a signal generation circuit having a short settling time of an output voltage. In a PTAT signal generation circuit, a trimming circuit is coupled between the cathodes of 0-th to K-th diodes and a line of a ground voltage, the anode of the 0-th diode is coupled to a first node, the anodes of the first to the K-th diodes are coupled to a second node via a resistive element, the first node and the second node are set to the same voltage, a first current flowing through the 0-th diode and a second current flowing through the first to the K-th diodes are set to have the same value, and a third current flowing through the trimming circuit is set to have the value 2 times that of each of the first current and the second current.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: February 13, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shigeki Obayashi, Hiroki Shimano, Masataka Minami, Hiroji Ozaki
  • Patent number: 9890165
    Abstract: Novel tricyclic compounds which have JAK inhibitory activities are useful for prevention, treatment or improvement of autoimmune diseases, inflammatory diseases and allergic diseases are provided. Novel tricyclic compound represented by the formula (I), the formula (II) or the formula (III) (wherein: each of A1, A2 and A3 is a cyclohexane-1,4-diyl group or the like; each of L1, L2 and L3 is a methylene group or the like; each of X1 and X3 is O or NH; each of R1 and R3 is a cyano C1-6 haloalkyl group or the like; and R2 is an aromatic heterocyclic group), a tautomer or pharmaceutically acceptable salt of the compound or a solvate thereof.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: February 13, 2018
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Tsuneo Watanabe, Keiji Takahashi, Keishi Hayashi, Takanori Nakamura, Masataka Minami, Kazunori Kurihara, Akio Yamamoto, Takuya Nishimura, Miyuki Uni, Toshihiko Kamiyama, Shunsuke Iwamoto
  • Patent number: 9882915
    Abstract: Device control method including: operation receiving step of receiving a device control operation for controlling a device; determining step of determining whether an operation terminal is in a first state or a second state; limiting step of, when determined in the determining step that the operation terminal is in the second state, limiting a range of controls of the device made available to the operation terminal when in the second state so as to correspond to part of a range of controls of the device made available to the operation terminal when in the first state; and device controlling step of controlling the device based on the device control operation. When determined in the determining step that the operation terminal is in the second state, the device is controlled within the range of controls of the device made available to the operation terminal when in the second state.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: January 30, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihisa Nakano, Masayuki Kozuka, Masataka Minami, Motoji Ohmori, Takeshi Matsuo, Tsuyoshi Sakata, Fumiaki Suzuki
  • Patent number: 9835499
    Abstract: The present invention provides a semiconductor device having a sensor capable of improving precision while suppressing increase in occupation area. A semiconductor device has: a first counter; and a second counter (time measuring circuit) measuring time until a count value, which is obtained by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the first counter. The first counter obtains a piece of digital information corresponding to the first voltage on the basis of a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, on the basis of the time measured by the time measuring circuit.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: December 5, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Naoya Arisaka, Masataka Minami, Takahiro Miki
  • Patent number: 9774608
    Abstract: A device control method used in a device control system in which an operation terminal is used to remotely operate a device with a server device mediating between the operation terminal and the device, the device control method including: acquiring, upon reception of an operation instruction for operation of the device from the operation terminal, environment information pertaining to at least one of the device and the operation terminal; performing a determination of whether or not to cause execution of processing corresponding to the operation instruction based on whether or not the environment information satisfies a predetermined condition; and causing the device to execute an execution command for execution of the processing when a result of the determination is affirmative, and not causing the device to execute the execution command when the result of the determination is negative.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: September 26, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihisa Nakano, Masayuki Kozuka, Masataka Minami, Motoji Ohmori, Takeshi Matsuo, Tsuyoshi Sakata, Fumiaki Suzuki
  • Patent number: 9720391
    Abstract: A user-friendly cooperative process execution method for causing household electric devices that are registered to a server to execute cooperative processes. The server stores correspondence information associating a particular operation to be executed by a particular household electric device with one or more groups each composed of one or more household electric devices, and indicating, for each of the household electric devices in each of the groups, a control signal to be transmitted to the household electric device. The method includes: detecting whether or not the particular operation is executed; selecting one of the groups that is composed of one or more household electric devices that are registered to the server by referring to the correspondence information when the execution of the particular operation is detected; and transmitting the control signal to each of the household electric devices in the selected group.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: August 1, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Toshihisa Nakano, Masayuki Kozuka, Masataka Minami, Motoji Ohmori, Takeshi Matsuo, Tsuyoshi Sakata, Fumiaki Suzuki, Masao Nonaka, Ryota Miyazaki, Kazuo Kajimoto, Yoshiyuki Miyabe
  • Publication number: 20170179136
    Abstract: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Inventors: Kenichi Osada, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Patent number: 9646678
    Abstract: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: May 9, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Kenichi Osada, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Publication number: 20170044161
    Abstract: Novel tricyclic compounds which have JAK inhibitory activities are useful for prevention, treatment or improvement of autoimmune diseases, inflammatory diseases and allergic diseases are provided. Novel tricyclic compound represented by the formula (I), the formula (II) or the formula (III) (wherein each of A1, A2 and A3 is a cyclohexane-1,4-diyl group or the like; each of L1, L2 and L3 is a methylene group or the like: each of X1 and X3 is O or NH; each of R1 and R3 is a cyano C1-6 haloalkyl group or the like; and R2 is an aromatic heterocyclic group), a tautomer or pharmaceutically acceptable salt of the compound or a solvate thereof.
    Type: Application
    Filed: May 11, 2015
    Publication date: February 16, 2017
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Tsuneo WATANABE, Keiji TAKAHASHI, Keishi HAYASHI, Takanori NAKAMURA, Masataka MINAMI, Kazunori KURIHARA, Akio YAMAMOTO, Takuya NISHIMURA, Miyuki UNI, Toshihiko KAMIYAMA, Shunsuke IWAMOTO
  • Patent number: 9556187
    Abstract: This disclosure relates to novel tricyclic pyrimidine compounds and tricyclic pyridine compounds having JAK inhibitory activities. A tricyclic heterocyclic compound represented by the formula (Ib), wherein the rings Ab and Bb, Xb, Yb, R1b, R2b, R3b, L1b, L2b, L3b and nb are as defined in the specification.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: January 31, 2017
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Keishi Hayashi, Tsuneo Watanabe, Koji Toyama, Junji Kamon, Masataka Minami, Miyuki Uni, Mariko Nasu
  • Patent number: 9524746
    Abstract: A server device (100a) includes a first generation unit (102a) generating binding information binding a user with content, a second acquisition unit (103a) acquiring a usage rule, a second generation unit (104a) generating a converted title key from a title key by using the binding information and the usage rule, and an output unit (105a) outputting content encrypted using the title key, the converted title key and the usage rule to the storage medium (600a). A playback device (700a) includes a generation unit (704a) performing the reverse of the conversion on the converted title key of the storage medium (600a) to generate a decrypted title key, by using the binding information received from the server device (100a) and the usage rule of the storage medium (600a), and a decryption unit (705a) decrypting the encrypted content of the storage medium (600a) by using the title key.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 20, 2016
    Assignee: PANASONIC CORPORATION
    Inventors: Toshihisa Nakano, Takahiro Yamaguchi, Masataka Minami, Masayuki Kozuka
  • Publication number: 20160340322
    Abstract: Disclosed is a novel triazinone compound with an inhibitory activity on a T-type voltage-dependent calcium channel, and is specifically useful for prevention or treatment of pain, chronic kidney disease and atrial fibrillation. A novel triazinone compound of Formula (I), wherein each substituent in the formula is defined in detail in the description, R4 means a hydrogen atom, or a C1-6 alkoxy group, etc., L1 and L2 each independently mean a single bond, or NR2, etc., L3 means a C1-6 alkylene group, etc., A means a C6-14 aryl group or a 5 to 10-membered heteroaryl group which may be substituted, B means a C3-11 cycloalkylene group, etc., D means a C6-14 aryl amino group or a 5 to 10-membered heteroaryl group which may be substituted, etc., a tautomer of the compound, a pharmaceutically acceptable salt of the compound, or a solvate of the compound, the tautomer, or the pharmaceutically acceptable salt.
    Type: Application
    Filed: December 17, 2014
    Publication date: November 24, 2016
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Michiaki ADACHI, Masataka MINAMI, Jun EGI, Yuichi HIRAI, Toshimasa IWAMOTO, Yusuke SHINTANI, Takuya OKADA, Daiki TAKAHASHI
  • Publication number: 20160329091
    Abstract: Prior known static random access memory (SRAM) cells are required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to occurrence of a problem as to the difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one regions is provided per group of thirty two memory cell rows or sixty four cell rows.
    Type: Application
    Filed: July 21, 2016
    Publication date: November 10, 2016
    Inventors: Kenichi Osada, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Patent number: 9449678
    Abstract: A P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one region is provided per group of thirty two memory cell rows or sixty four cell rows.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: September 20, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Kenichi Osada, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Publication number: 20160187204
    Abstract: The present invention provides a semiconductor device having a sensor capable of improving precision while suppressing increase in occupation area. A semiconductor device has: a first counter; and a second counter (time measuring circuit) measuring time until a count value, which is obtained by counting a first signal having a frequency corresponding to a first voltage, reaches a largest count value which can be counted by the first counter. The first counter obtains a piece of digital information corresponding to the first voltage on the basis of a count value obtained by counting a second signal having a frequency corresponding to a second voltage, which is different from the first voltage, on the basis of the time measured by the time measuring circuit.
    Type: Application
    Filed: October 30, 2015
    Publication date: June 30, 2016
    Inventors: Naoya ARISAKA, Masataka MINAMI, Takahiro MIKI
  • Publication number: 20160102102
    Abstract: This disclosure relates to novel tricyclic pyrimidine compounds and tricyclic pyridine compounds having JAK inhibitory activities. A tricyclic heterocyclic compound represented by the formula (Ib), wherein the rings Ab and Bb, Xb, Yb, R1b, R2b, R3b, L1b, L2b, L3b and nb are as defined in the specification.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 14, 2016
    Applicant: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Keishi HAYASHI, Tsuneo Watanabe, Koji Toyama, Junji Kamon, Masataka Minami, Miyuki Uni, Mariko Nasu
  • Patent number: 9286968
    Abstract: Prior known static random access memory (SRAM) cells required that a diffusion layer be bent into a key-like shape in order to make electrical contact with a substrate with a P-type well region formed therein, which would result in a decrease in asymmetry leading to difficulty in micro-patterning. To avoid this problem, the P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supply power to the substrate are formed in parallel to word lines.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: March 15, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Kenichi Osada, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Publication number: 20160049188
    Abstract: A P-type well region in which an inverter making up an SRAM cell is formed is subdivided into two portions, which are disposed on the opposite sides of an N-type well region NW1 and are formed so that a diffusion layer forming a transistor has no curvature while causing the layout direction to run in a direction parallel to well boundary lines and bit lines. At intermediate locations of an array, regions for use in supplying power to the substrate are formed in parallel to word lines in such a manner that one region is provided per group of thirty two memory cell rows or sixty four cell rows.
    Type: Application
    Filed: June 26, 2015
    Publication date: February 18, 2016
    Inventors: Kenichi OSADA, Masataka Minami, Shuji Ikeda, Koichiro Ishibashi
  • Patent number: 9216999
    Abstract: Novel tricyclic pyrimidine compounds and tricyclic pyridine compounds having JAK inhibitory activities are provided. A tricyclic heterocyclic compound represented by the formula (Ia): wherein the rings Aa and Ba, Xa, Ya, R1a, R2a, R3a, L1a L2a, L3a and na are as defined in the description.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: December 22, 2015
    Assignee: Nissan Chemical Industries, Ltd.
    Inventors: Keishi Hayashi, Tsuneo Watanabe, Koji Toyama, Junji Kamon, Masataka Minami, Miyuki Uni, Mariko Nasu
  • Patent number: 9178702
    Abstract: Provided is a revocation list generation device that can suppress an increase in the amount of data of a revocation list. A revocation list generation device that generates a revocation list includes an acquisition unit that acquires, for a content, a revocation identifier identifying a revoked public key certificate allocated to an apparatus related to use of the content, a revocation list generation unit that generates a revocation list including the acquired revocation identifier associated with the content, and an output unit that outputs the revocation list.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: November 3, 2015
    Assignee: Panasonic Corporation
    Inventors: Masayuki Kozuka, Takahiro Yamaguchi, Toshihisa Nakano, Kaoru Murase, Motoji Ohmori, Makoto Morise, Masataka Minami