Patents by Inventor Masato Kushibiki

Masato Kushibiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9660182
    Abstract: A plasma processing method of etching a multilayered material having a structure where a first magnetic layer 105 and a second magnetic layer 103 are stacked with an insulating layer 104 therebetween is performed by a plasma processing apparatus 10 including a processing chamber 12 where a processing space S is formed; and a gas supply unit 44 of supplying a processing gas into the processing space, and includes a first etching process where the first magnetic layer is etched by supplying a first processing gas and generating plasma, and the first etching process is stopped on a surface of the insulating layer; and a second etching process where a residue Z is removed by supplying a second processing gas and generating plasma. The first magnetic layer and the second magnetic layer contain CoFeB, the first processing gas contains Cl2, and the second processing gas contains H2.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: May 23, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takashi Sone, Daisuke Urayama, Masato Kushibiki, Nao Koizumi, Wataru Kume, Eiichi Nishimura, Fumiko Yamashita
  • Patent number: 9419211
    Abstract: A gas for an etching process and a treatment process of a metal stacked film in which an insulating layer is interposed between two layers of magnetic materials can be optimized. An etching method of etching a multilayered film including a metal stacked film in which an insulating layer is interposed between a first magnetic layer and a second magnetic layer includes etching the metal stacked film with plasma generated by supplying a gas containing at least C, O, and H into a processing chamber; and treating the metal stacked film with plasma generated by supplying a gas containing at least a CF4 gas into the processing chamber.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: August 16, 2016
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Masato Kushibiki, Nao Koizumi, Takashi Sone, Fumiko Yamashita
  • Patent number: 9208997
    Abstract: A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: December 8, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Masato Kushibiki, Takashi Sone, Akitaka Shimizu, Fumiko Yamashita
  • Patent number: 9165784
    Abstract: Disclosed is a substrate processing method capable of preventing an etching rate from being deteriorated when a high aspect ratio hole or trench is formed on an oxide film. When a high aspect ratio hole or trench is formed on an oxide film by etching the oxide film formed on a wafer using a hard mask layer having an opening and made of silicon, the oxide film corresponding to the opening is etched using plasma generated from a processing gas containing a C4F6 gas and a methane gas. Subsequently, a reactive product generated by the etching and deposited on an inner surface of the hole of the oxide film is ashed with plasma generated from a processing gas containing an oxygen gas, and the etching and the ashing processes are repeated in sequence.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: October 20, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Eiichi Nishimura, Masato Kushibiki, Fumiko Yamashita
  • Patent number: 8962489
    Abstract: Disclosed is a method for etching a film contains cobalt and palladium is provided. A hard mask is provided on the film. The method film includes a process “a” of etching the film by ion sputter etching, a process “b” of exposing a workpiece to plasma of a first gas containing halogen elements after the process “a” of etching of the film, a process “c” of exposing the workpiece to plasma of a second gas containing carbons after the process “b” of exposing the workpiece to the plasma of the first gas, and a process “d” of exposing the workpiece to plasma of a third gas containing a noble gas after the process “c” of exposing the workpiece to the plasma of the second gas. In the method, a temperature of a placement table on which the workpiece is placed is set to a first temperature of 10° C. or less in the process “a”, process “b” and process “c”.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 24, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Masato Kushibiki
  • Publication number: 20150050750
    Abstract: A plasma processing method of etching a multilayered material having a structure where a first magnetic layer 105 and a second magnetic layer 103 are stacked with an insulating layer 104 therebetween is performed by a plasma processing apparatus 10 including a processing chamber 12 where a processing space S is formed; and a gas supply unit 44 of supplying a processing gas into the processing space, and includes a first etching process where the first magnetic layer is etched by supplying a first processing and generating plasma, and the first etching process is stopped on a surface of the insulating layer; and a second etching process where a residue Z is removed by supplying a second processing gas and generating plasma. The first magnetic layer and the second magnetic layer contain CoFeB, the first processing gas contains Cl2, and the second processing gas contains H2.
    Type: Application
    Filed: April 22, 2013
    Publication date: February 19, 2015
    Applicant: Tokyo Electron Limited
    Inventors: Takashi Sone, Daisuke Urayama, Masato Kushibiki, Nao Koizumi, Wataru Kume, Eiichi Nishimura, Fumiko Yamashita
  • Publication number: 20140287591
    Abstract: Disclosed is a method for etching a film contains cobalt and palladium is provided. A hard mask is provided on the film. The method film includes a process “a” of etching the film by ion sputter etching, a process “b” of exposing a workpiece to plasma of a first gas containing halogen elements after the process “a” of etching of the film, a process “c” of exposing the workpiece to plasma of a second gas containing carbons after the process “b” of exposing the workpiece to the plasma of the first gas, and a process “d” of exposing the workpiece to plasma of a third gas containing a noble gas after the process “c” of exposing the workpiece to the plasma of the second gas. In the method, a temperature of a placement table on which the workpiece is placed is set to a first temperature of 10° C. or less in the process “a”, process “b” and process “c”.
    Type: Application
    Filed: March 18, 2014
    Publication date: September 25, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Eiichi NISHIMURA, Masato KUSHIBIKI
  • Patent number: 8815495
    Abstract: A disclosed mask pattern forming method includes isotropically coating a surface of a resist pattern array having a predetermined line width with a silicon oxide film, embedding a gap in the resist pattern array coated by the silicon oxide film with a carbon film, removing the carbon film from the upper portion and etching back the carbon film while leaving the carbon film within the gap in any order, removing the remaining carbon film and etching back the upper portion of the resist pattern array to have a predetermined film thickness in any order, and forming a first mask pattern array which has a center portion having a predetermined width and film sidewall portions sandwiching the predetermined width, and arranged interposing a space width substantially the same as the predetermined line width with an asking process provided to the resist pattern array exposed from the removed silicon oxide film.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: August 26, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8772172
    Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: July 8, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Publication number: 20140120635
    Abstract: A gas for an etching process and a treatment process of a metal stacked film in which an insulating layer is interposed between two layers of magnetic materials can be optimized. An etching method of etching a multilayered film including a metal stacked film in which an insulating layer is interposed between a first magnetic layer and a second magnetic layer includes etching the metal stacked film with plasma generated by supplying a gas containing at least C, O, and H into a processing chamber; and treating the metal stacked film with plasma generated by supplying a gas containing at least a CF4 gas into the processing chamber.
    Type: Application
    Filed: October 29, 2013
    Publication date: May 1, 2014
    Applicant: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Masato Kushibiki, Nao Koizumi, Takashi Sone, Fumiko Yamashita
  • Publication number: 20140110373
    Abstract: A method of etching a copper layer of a target object including, on the copper layer, a mask having a pattern to be transferred onto the copper layer is provided. The method includes etching the copper layer by using plasma of a first gas containing a hydrogen gas; and processing the target object by using plasma of a second gas containing a hydrogen gas and a gas (hereinafter, referred to as “deposition gas”) that is deposited on the target object. Further, the etching of the copper layer by using plasma of the first gas and the processing of the target object by using plasma of the second gas are repeated alternately.
    Type: Application
    Filed: October 21, 2013
    Publication date: April 24, 2014
    Inventors: Eiichi Nishimura, Masato Kushibiki, Takashi Sone, Akitaka Shimizu, Fumiko Yamashita
  • Patent number: 8642136
    Abstract: A substrate processing method includes performing a deposition process of depositing a thin film on the substrate while depressurizing the inside of the processing chamber and introducing the gas thereinto; and, while the deposition process is being performed, irradiating light, which is transmitted through a monitoring window installed at the processing chamber, toward the inside of the processing chamber through the monitoring window, and monitoring a reflection light intensity of reflection light by receiving the reflection light through the monitoring window. The substrate processing method further includes measuring a temporal variation in the reflection light intensity during the deposition process and calculating a termination time of the deposition process based on a measurement value of the temporal variation; and terminating the deposition process by setting the termination time as an end point of the deposition process.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: February 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura, Akitaka Shimizu
  • Publication number: 20130302993
    Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 14, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masato KUSHIBIKI, Eiichi NISHIMURA
  • Patent number: 8530354
    Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: September 10, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8491804
    Abstract: A method of processing a substrate having a processing target layer and an organic film serving as a mask layer includes a mineralizing process of mineralizing the organic film. The mineralizing process includes an adsorption process for allowing a silicon-containing gas to be adsorbed onto a surface of the organic film; and an oxidation process for oxidizing the adsorbed silicon-containing gas to be converted into a silicon oxide film. A monovalent aminosilane is employed as the silicon-containing gas.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: July 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8491805
    Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: July 23, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8383521
    Abstract: A substrate processing method processes a substrate including a processing target film, an organic film provided on the processing target film and having a plurality of line-shaped portions having fine width, and a hard film covering the line-shaped portions and the processing target film exposed between the line-shaped portions. The method includes a first etching step of etching a part of the hard film to expose the organic film and portions of the processing target film between the line-shaped portions; an ashing step of selectively removing the exposed organic film; and a second etching step of etching a part of the remaining hard film.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Eiichi Nishimura, Masato Kushibiki, Fumiko Yamashita
  • Publication number: 20120244718
    Abstract: Disclosed is a substrate processing method capable of preventing an etching rate from being deteriorated when a high aspect ratio hole or trench is formed on an oxide film. When a high aspect ratio hole or trench is formed on an oxide film by etching the oxide film formed on a wafer using a hard mask layer having an opening and made of silicon, the oxide film corresponding to the opening is etched using plasma generated from a processing gas containing a C4F6 gas and a methane gas. Subsequently, a reactive product generated by the etching and deposited on an inner surface of the hole of the oxide film is ashed with plasma generated from a processing gas containing an oxygen gas, and the etching and the ashing processes are repeated in sequence.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Eiichi NISHIMURA, Masato KUSHIBIKI, Fumiko YAMASHITA
  • Patent number: 8252698
    Abstract: In a substrate processing method of processing a substrate in which a processing target layer, an intermediate layer, and a mask layer are stacked one on top of another, the mask layer having an opening that partially exposes the intermediate layer, a thickness of the mask layer is increased by depositing deposits on an upper surface of the mask layer with plasma generated from a mixed gas of SF6 gas and a depositive gas represented in a general equation, CxHyFz (where, x, y, and z are positive integers).
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: August 28, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura
  • Patent number: 8241511
    Abstract: The present invention provides a substrate processing method to process a substrate including at least a process layer, an intermediate layer, and a mask layer which are stacked in this order. The mask layer includes an aperture configured to expose a portion of the intermediate layer. The substrate processing method includes a material deposition step of depositing a material on a side surface of the aperture and exposing a portion of the process layer by etching the exposed portion of the intermediate layer by plasma generated from a deposit gas, and an etching step of etching the exposed portion of the process layer.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: August 14, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masato Kushibiki, Eiichi Nishimura