Patents by Inventor Masatoshi Ishihara

Masatoshi Ishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200041336
    Abstract: The signal processing board includes a plurality of signal processing circuits configured to process signals output from a plurality of pixels of an infrared detecting element. The signal processing board includes an element placement area where the infrared detecting element is placed, and a circuit placement area positioned outside the element placement area to surround the element placement area when viewed from a direction orthogonal to the signal processing board. The signal processing board includes a plurality of insulating layers that are stacked on a surface side opposing the semiconductor substrate. A plurality of signal processing circuits are placed in the circuit placement area. A heat-conducting layer is placed to be positioned on at least one of the insulating layers and in the element placement area, in the signal processing board. The heat-conducting layer has a heat conductivity that is higher than a heat conductivity of the insulating layers.
    Type: Application
    Filed: October 7, 2019
    Publication date: February 6, 2020
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi ISHIHARA, Hiroo YAMAMOTO, Yoshiaki OHSHIGE
  • Patent number: 10480995
    Abstract: The signal processing board includes a plurality of signal processing circuits configured to process signals output from a plurality of pixels of an infrared detecting element. The signal processing board includes an element placement area where the infrared detecting element is placed, and a circuit placement area positioned outside the element placement area to surround the element placement area when viewed from a direction orthogonal to the signal processing board. The signal processing board includes a plurality of insulating layers that are stacked on a surface side opposing the semiconductor substrate. A plurality of signal processing circuits are placed in the circuit placement area. A heat-conducting layer is placed to be positioned on at least one of the insulating layers and in the element placement area, in the signal processing board. The heat-conducting layer has a heat conductivity that is higher than a heat conductivity of the insulating layers.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: November 19, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi Ishihara, Hiroo Yamamoto, Yoshiaki Ohshige
  • Patent number: 10393649
    Abstract: A THz bolometer detector includes a directional antenna 1 that receives a THz wave having a wavelength ? and radiates the received THz wave, a reception antenna 2 that is provided so as to face the directional antenna 1, and a bolometer 4 that detects heat generation due to a current flowing in the reception antenna 2. The directional antenna 1 overlaps the reception antenna 2 in plan view, and a longitudinal length of the directional antenna 1 is set to be less than a longitudinal length of the reception antenna 2.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: August 27, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryusuke Kitaura, Masatoshi Ishihara, Masahiro Yamazaki, Hironori Takahashi
  • Publication number: 20180266945
    Abstract: A THz bolometer detector includes a directional antenna 1 that receives a THz wave having a wavelength ? and radiates the received THz wave, a reception antenna 2 that is provided so as to face the directional antenna 1, and a bolometer 4 that detects heat generation due to a current flowing in the reception antenna 2. The directional antenna 1 overlaps the reception antenna 2 in plan view, and a longitudinal length of the directional antenna 1 is set to be less than a longitudinal length of the reception antenna 2.
    Type: Application
    Filed: January 13, 2016
    Publication date: September 20, 2018
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Ryusuke KITAURA, Masatoshi ISHIHARA, Masahiro YAMAZAKI, Hironori TAKAHASHI
  • Publication number: 20180238733
    Abstract: The signal processing board includes a plurality of signal processing circuits configured to process signals output from a plurality of pixels of an infrared detecting element. The signal processing board includes an element placement area where the infrared detecting element is placed, and a circuit placement area positioned outside the element placement area to surround the element placement area when viewed from a direction orthogonal to the signal processing board. The signal processing board includes a plurality of insulating layers that are stacked on a surface side opposing the semiconductor substrate. A plurality of signal processing circuits are placed in the circuit placement area. A heat-conducting layer is placed to be positioned on at least one of the insulating layers and in the element placement area, in the signal processing board. The heat-conducting layer has a heat conductivity that is higher than a heat conductivity of the insulating layers.
    Type: Application
    Filed: November 19, 2015
    Publication date: August 23, 2018
    Applicant: Hamamatsu Photonics K.K.
    Inventors: Masatoshi ISHIHARA, Hiroo YAMAMOTO, Yoshiaki OHSHIGE
  • Patent number: 9496298
    Abstract: A first semiconductor substrate 1 and a second semiconductor substrate 2 are different in material, and therefore have sensitivities to incident light of mutually different wavelength bands. Respective photodiodes of photodiode arrays are connected to amplifiers of the first semiconductor substrate 1. According to this method, the second semiconductor substrate 2 is separated from the wafer by etching the second semiconductor substrate 2 and then dicing a deepest portion of the etched groove. The density of crystal defects in a side surface produced by etching is smaller than the density of crystal defects in a side surface produced by dicing. Because a photodiode located in an end portion of the second semiconductor substrate 2 does not need to be removed, a reduction in the number of photodiodes can be suppressed.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: November 15, 2016
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Patent number: 8994041
    Abstract: This photodiode array module includes a first semiconductor substrate 2 having a first photodiode array that is sensitive to light of a first wavelength band, a second semiconductor substrate 2? having a second photodiode array that is sensitive to light of a second wavelength band, and a third semiconductor substrate 3 which is formed with a plurality of amplifiers AMP and on which the first and second semiconductor substrates 2, 2? are placed side by side without overlapping, and which connects each photodiode to the amplifier AMP via a bump. In adjacent end portions of the first semiconductor substrate 2 and the second semiconductor substrate 2?, stepped portions are formed, which thus allows performing measurement with low noise even when respective pixels are aligned successively over both substrates.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: March 31, 2015
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Publication number: 20140021575
    Abstract: This photodiode array module includes a first semiconductor substrate 2 having a first photodiode array that is sensitive to light of a first wavelength band, a second semiconductor substrate 2? having a second photodiode array that is sensitive to light of a second wavelength band, and a third semiconductor substrate 3 which is formed with a plurality of amplifiers AMP and on which the first and second semiconductor substrates 2, 2? are placed side by side without overlapping, and which connects each photodiode to the amplifier AMP via a bump. In adjacent end portions of the first semiconductor substrate 2 and the second semiconductor substrate 2?, stepped portions are formed, which thus allows performing measurement with low noise even when respective pixels are aligned successively over both substrates.
    Type: Application
    Filed: March 27, 2012
    Publication date: January 23, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Publication number: 20140008754
    Abstract: A first semiconductor substrate 1 and a second semiconductor substrate 2 are different in material, and therefore have sensitivities to incident light of mutually different wavelength bands. Respective photodiodes of photodiode arrays are connected to amplifiers of the first semiconductor substrate 1. According to this method, the second semiconductor substrate 2 is separated from the wafer by etching the second semiconductor substrate 2 and then dicing a deepest portion of the etched groove. The density of crystal defects in a side surface produced by etching is smaller than the density of crystal defects in a side surface produced by dicing. Because a photodiode located in an end portion of the second semiconductor substrate 2 does not need to be removed, a reduction in the number of photodiodes can be suppressed.
    Type: Application
    Filed: March 27, 2012
    Publication date: January 9, 2014
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hirokazu Yamamoto
  • Patent number: 8564036
    Abstract: In a photodetector 1, a low-resistance Si substrate 3, an insulating layer 4, a high-resistance Si substrate 5, and an Si photodiode 20 construct a hermetically sealed package for an InGaAs photodiode 30 placed within a recess 6, while an electric passage part 8 of the low-resistance Si substrate 3 and a wiring film 15 achieve electric wiring for the Si photodiode 20 and InGaAs photodiode 30. While a p-type region 22 of the Si photodiode 20 is disposed in a part on the rear face 21b side of an Si substrate 21, a p-type region 32 of the InGaAs photodiode 30 is disposed in a part on the front face 31a side of an InGaAs substrate 31.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: October 22, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Yoshihisa Warashina, Masatoshi Ishihara, Tomofumi Suzuki
  • Publication number: 20120187517
    Abstract: In a photodetector 1, a low-resistance Si substrate 3, an insulating layer 4, a high-resistance Si substrate 5, and an Si photodiode 20 construct a hermetically sealed package for an InGaAs photodiode 30 placed within a recess 6, while an electric passage part 8 of the low-resistance Si substrate 3 and a wiring film 15 achieve electric wiring for the Si photodiode 20 and InGaAs photodiode 30. While a p-type region 22 of the Si photodiode 20 is disposed in a part on the rear face 21b side of an Si substrate 21, a p-type region 32 of the InGaAs photodiode 30 is disposed in a part on the front face 31a side of an InGaAs substrate 31.
    Type: Application
    Filed: July 7, 2010
    Publication date: July 26, 2012
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Yoshihisa Warashina, Masatoshi Ishihara, Tomofumi Suzuki
  • Patent number: 7791016
    Abstract: A photodetector includes a plurality of photodetecting elements which output electrical signals corresponding to the intensities of light that entered these; a signal processing element which is opposed to the photodetecting elements and is connected to the photodetecting elements via conductive bumps, and into which electrical signals output from the photodetecting elements are input; a resin which has electrical insulation and is filled in at least at the gaps between the photodetecting elements and the signal processing element; and a light shielding member arranged so as to cover the surfaces exposed from the photodetecting elements and the signal processing element in the resin.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: September 7, 2010
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Masatoshi Ishihara, Nao Inoue, Hiroo Yamamoto
  • Publication number: 20090108181
    Abstract: A photodetector includes a plurality of photodetecting elements which output electrical signals corresponding to the intensities of light that entered these; a signal processing element which is opposed to the photodetecting elements and is connected to the photodetecting elements via conductive bumps, and into which electrical signals output from the photodetecting elements are input; a resin which has electrical insulation and is filled in at least at the gaps between the photodetecting elements and the signal processing element; and a light shielding member arranged so as to cover the surfaces exposed from the photodetecting elements and the signal processing element in the resin.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 30, 2009
    Applicant: HAMAMATSU PHOTONICS K.K.
    Inventors: Masatoshi ISHIHARA, Nao Inoue, Hiroo Yamamoto
  • Patent number: 6812790
    Abstract: In a signal read circuit including a plurality of circuit rows each having a charge amplifier connected to a photoelectric conversion element PD and a CDS circuit 2S for performing correlated double sampling for an output from the charge amplifier, a dummy circuit row DMY having the same configuration as a circuit row SLT is connected in parallel with this circuit row SLT. By calculating the difference between these circuit rows connected in parallel, offset variations generated in the two circuit rows SLT and DMY can be removed.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: November 2, 2004
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Masatoshi Ishihara, Hiroo Yamamoto, Seiichiro Mizuno
  • Publication number: 20030011407
    Abstract: In a signal read circuit including a plurality of circuit rows each having a charge amplifier connected to a photoelectric conversion element PD and a CDS circuit 2S for performing correlated double sampling for an output from the charge amplifier, a dummy circuit row DMY having the same configuration as a circuit row SLT is connected in parallel with this circuit row SLT. By calculating the difference between these circuit rows connected in parallel, offset variations generated in the two circuit rows SLT and DMY can be removed.
    Type: Application
    Filed: August 27, 2002
    Publication date: January 16, 2003
    Inventors: Masatoshi Ishihara, Hiroo Yamamoto, Seiichiro Mizuno
  • Patent number: 5912463
    Abstract: A light chopper periodically transmits and blocks light, and first a dark current cancelling circuit determines an approximate mean value of the dark current from a photodiode when the light is blocked and cancels thus the mean value from the current signal fed into the integrated circuit, add to this, a differential arithmetic circuit that subtracts the remaining dark current component from the output of the integration circuit, thus the remaining signal indicates only the signal current component.
    Type: Grant
    Filed: August 18, 1997
    Date of Patent: June 15, 1999
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Seiichiro Mizuno, Hideo Takahashi, Masatoshi Ishihara