Abstract: A field effect transistor includes a semiconductor substrate and multiple trenches disposed at a top surface of the semiconductor substrate. The trenches extend in a first direction at the top surface of the semiconductor substrate, and are disposed to be spaced apart in a direction perpendicular to the first direction. Connection regions are disposed below body regions. The connection regions extend in a second direction intersecting the first direction in a top view of the semiconductor substrate, and are spaced apart in a direction perpendicular to the second direction. Field relaxation regions are disposed below the connection regions and the trenches. The field relaxation regions extend in a third direction intersecting the first direction and the second direction in the top view of the semiconductor substrate, and are spaced apart in a direction perpendicular to the third direction.

Abstract: A silicon carbide semiconductor device includes an electric field relaxation layer disposed in a drift layer. The electric field relaxation layer includes a first region having a second conductivity type and disposed at a position deeper than trenches, and a second region having the second conductivity type and disposed between the adjacent trenches to be away from a side surface of each of the adjacent trenches. Each of the first region and the second region is made of an ion implantation layer. The electric field relaxation layer further includes a double implantation region in which the first region and the second region overlap with each other, and the electric field relaxation layer has a peak of a second conductivity type impurity concentration in the double implantation region.

Abstract: A switching element may include a semiconductor substrate, first and second trenches, a gate insulating layer, an interlayer insulating layer covering the semiconductor substrate, and an electrode on the interlayer insulating layer. A wide portion and a narrow portion may be arranged alternately between the first and second trenches. The interlayer insulating layer may include a contact hole in the wide portion. The electrode may be in contact with the semiconductor substrate within the contact hole. The semiconductor substrate may include an upper n-type region in contact with the gate insulating layer in the narrow portion and in contact with the electrode, a p-type body contact region in contact with the electrode, a p-type body region in contact with the gate insulating layer in the narrow portion, and a lower n-type region in contact with the gate insulating layer in the narrow portion.

Abstract: A floating region includes a high-concentration region and a low-concentration region that are arranged along a thickness direction of a silicon carbide substrate. A concentration of a p-type dopant in the low-concentration region is lower than a concentration of the p-type dopant in the high-concentration region. The high-concentration region contacts the low-concentration region, and is disposed between a bottom surface of a trench and the low-concentration region. In graph obtained by plotting the concentration of the p-type dopant in the floating region along the thickness direction, a bending point or an inflection point appears on a boundary between the high-concentration region and the low-concentration region. A content of the p-type dopant in the low-concentration region is equal to or higher than a content of an n-type dopant in a portion of the drift region, which is adjacent to the low-concentration region in the thickness direction.

Abstract: A switching element may include a semiconductor substrate, first and second trenches, a gate insulating layer, an interlayer insulating layer covering the semiconductor substrate, and an electrode on the interlayer insulating layer. A wide portion and a narrow portion may be arranged alternately between the first and second trenches. The interlayer insulating layer may include a contact hole in the wide portion. The electrode may be in contact with the semiconductor substrate within the contact hole. The semiconductor substrate may include an upper n-type region in contact with the gate insulating layer in the narrow portion and in contact with the electrode, a p-type body contact region in contact with the electrode, a p-type body region in contact with the gate insulating layer in the narrow portion, and a lower n-type region in contact with the gate insulating layer in the narrow portion.

Abstract: A method for producing a semiconductor device includes: an arranging process of arranging a plurality of silicon carbide wafers having opposed first and surfaces so that the first surface and the second surface of adjacent silicon carbide wafers face each other and are separated in parallel; and a heat treatment process of heating the arranged plurality of silicon carbide wafers so that the first surface of each silicon carbide wafer becomes higher in temperature than the second surface thereof, and, in the adjacent silicon carbide wafers, the second surface of one silicon carbide wafer becomes higher in temperature than the first surface of the other silicon carbide wafer that faces the second surface.

Abstract: A method for producing a semiconductor device includes: an arranging process of arranging a plurality of silicon carbide wafers having opposed first and surfaces so that the first surface and the second surface of adjacent silicon carbide wafers face each other and are separated in parallel; and a heat treatment process of heating the arranged plurality of silicon carbide wafers so that the first surface of each silicon carbide wafer becomes higher in temperature than the second surface thereof, and, in the adjacent silicon carbide wafers, the second surface of one silicon carbide wafer becomes higher in temperature than the first surface of the other silicon carbide wafer that faces the second surface.

Abstract: A photometer comprising a light source, a rotating plate provided with a plurality of filter means having different wave lengths, a reference plate and a sample means, said rotating plate disposed between said light source and said reference plate and sample means, and a half-mirror and a reflection plate located between said light source and said rotating plate, said half-mirror and reflection plate being disposed so as to form a first light passage adapted to extend to the reference plate, and a second light passage adapted to extend to the sample means, whereby alternate radiation through one of said filter means against the reference plate and the sample means is made by the rotation of said rotary plate.