Patents by Inventor Masatsugu Amishiro

Masatsugu Amishiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130241067
    Abstract: The production of a crack in an insulating film under an external terminal of a semiconductor device due to external force applied to the external terminal is suppressed or prevented. Over the principal surface of a semiconductor substrate, there are formed multiple wiring layers. In the fifth wiring layer directly under the uppermost wiring layer of the wiring layers, the following measure is taken: a conductor pattern (fifth wiring, dummy wiring, and plug) is not formed directly under the probe contact area of each bonding pad PD in the uppermost wiring layer. In the fifth wiring layer, conductor patterns (fifth wiring, dummy wirings, and plugs) are formed in the areas other than directly under the probe contact area of each bonding pad in the uppermost wiring layer.
    Type: Application
    Filed: April 30, 2013
    Publication date: September 19, 2013
    Applicant: Renesas Electronics Corporation
    Inventors: Takeshi FURUSAWA, Takao KAMOSHIMA, Masatsugu AMISHIRO
  • Publication number: 20120289032
    Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed. Over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11, insulating films 14, 15, 16 are formed. An opening is formed in those insulating films and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 to form the opening. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance. By interposing the insulating film 14 therebetween with a higher density of Si (silicon) atoms than the insulating film 11, an electrically weak interface is prevented from being formed.
    Type: Application
    Filed: May 21, 2012
    Publication date: November 15, 2012
    Inventors: Takeshi FURUSAWA, Takao KAMOSHIMA, Masatsugu AMISHIRO, Naohito SUZUMURA, Shoichi FUKUI, Masakazu OKADA
  • Patent number: 8203210
    Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: June 19, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Takeshi Furusawa, Takao Kamoshima, Masatsugu Amishiro, Naohito Suzumura, Shoichi Fukui, Masakazu Okada
  • Publication number: 20110001246
    Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.
    Type: Application
    Filed: September 15, 2010
    Publication date: January 6, 2011
    Inventors: Takeshi FURUSAWA, Takao Kamoshima, Masatsugu Amishiro, Naohito Suzumura, Shoichi Fukui, Masakazu Okada
  • Patent number: 7759975
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: July 20, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Publication number: 20090184424
    Abstract: The production of a crack in an insulating film under an external terminal of a semiconductor device due to external force applied to the external terminal is suppressed or prevented. Over the principal surface of a semiconductor substrate, there are formed multiple wiring layers. In the fifth wiring layer directly under the uppermost wiring layer of the wiring layers, the following measure is taken: a conductor pattern (fifth wiring, dummy wiring, and plug) is not formed directly under the probe contact area of each bonding pad PD in the uppermost wiring layer. In the fifth wiring layer, conductor patterns (fifth wiring, dummy wirings, and plugs) are formed in the areas other than directly under the probe contact area of each bonding pad in the uppermost wiring layer.
    Type: Application
    Filed: January 8, 2009
    Publication date: July 23, 2009
    Inventors: Takeshi Furusawa, Takao Kamoshima, Masatsugu Amishiro
  • Publication number: 20090115506
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Application
    Filed: December 29, 2008
    Publication date: May 7, 2009
    Applicant: HITACHI, LTD.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 7522692
    Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
    Type: Grant
    Filed: March 7, 2007
    Date of Patent: April 21, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Patent number: 7479804
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: January 20, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Publication number: 20080230847
    Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.
    Type: Application
    Filed: January 14, 2008
    Publication date: September 25, 2008
    Inventors: Takeshi Furusawa, Takao Kamoshima, Masatsugu Amishiro, Naohito Suzumura, Shoichi Fukui, Masakazu Okada
  • Patent number: 7289553
    Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: October 30, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Publication number: 20070153886
    Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
    Type: Application
    Filed: March 7, 2007
    Publication date: July 5, 2007
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Patent number: 7102388
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: February 4, 2003
    Date of Patent: September 5, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 6977522
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: December 20, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Publication number: 20030169808
    Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.
    Type: Application
    Filed: March 4, 2003
    Publication date: September 11, 2003
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Patent number: 6603807
    Abstract: An isolator is made monolithic by forming a capacitive insulating barrier using an interlayer insulation film on the semiconductor substrate to miniaturize the modem device by the monolithic isolator.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: August 5, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
  • Publication number: 20030117751
    Abstract: A first converter circuit converts a state signal, whose level is constant or slowly varies during a predetermine period of time, into a pulse signal to allow the signal to propagate across an electrically insulating area. A second converter circuit converts the pulse signal, which has propagated through an insulating circuit, into the original state signal or a signal having the same characteristics as the original state signal.
    Type: Application
    Filed: February 4, 2003
    Publication date: June 26, 2003
    Applicant: HITACHI, LTD.
    Inventors: Fumio Murabayashi, Takashi Sase, Mutsumi Kikuchi, Atsuo Watanabe, Masatsugu Amishiro, Kenji Tabuchi
  • Patent number: 6563200
    Abstract: In an interface device in which by means of a buried insulation film 412 and a region insulation portion 410 an SOI substrate 414 is divided into a semiconductor support substrate region 411, a controller side region 407 and a network side region 408 and a part of isolator circuits 405 and 406 making use of a static capacitance are formed in the network side region 408, the semiconductor support substrate region 411 and the network side region 408 are connected to a network power source to always keep these regions at a same potential, thereby, an interface device using a dielectric isolation substrate which suppresses erroneous operations due to noises and characteristic deterioration, and a system using the same are provided.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: May 13, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Mutsumi Kikuchi, Fumio Murabayashi, Takashi Sase, Atsuo Watanabe, Masatsugu Amishiro
  • Publication number: 20020105062
    Abstract: In an interface device in which by means of a buried insulation film 412 and a region insulation portion 410 an SOI substrate 414 is divided into a semiconductor support substrate region 411, a controller side region 407 and a network side region 408 and a part of isolator circuits 405 and 406 making use of a static capacitance are formed in the network side region 408, the semiconductor support substrate region 411 and the network side region 408 are connected to a network power source to always keep these regions at a same potential, thereby, an interface device using a dielectric isolation substrate which suppresses erroneous operations due to noises and characteristic deterioration, and a system using the same are provided.
    Type: Application
    Filed: August 29, 2001
    Publication date: August 8, 2002
    Inventors: Mutsumi Kikuchi, Fumio Murabayashi, Takashi Sase, Atsuo Watanabe, Masatsugu Amishiro