Patents by Inventor Masayasu Tanaka

Masayasu Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11925621
    Abstract: The present invention pertains to a drug for the treatment and/or prevention of pain, more specifically to a medicinal preparation for external use to treat and/or prevent peripheral neuropathic pain, the medicinal preparation containing as an active ingredient N2-{[1-ethyl-6-(4-methylphenoxy)-1H-benzimidazol-2-yl]methyl}-L-alaninamide.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: March 12, 2024
    Assignee: SUMITOMO PHARMA CO., LTD.
    Inventors: Masayasu Tanaka, Yoshihiro Oyamada, Yoshinori Takada
  • Patent number: 11912826
    Abstract: Provided is a fiber-reinforced thermoplastic resin prepreg which exhibits high interfacial adhesion between reinforcement fibers and a matrix resin, while having excellent interlaminar fracture resistance. The fiber-reinforced thermoplastic resin prepreg of the present invention comprises: a matrix resin comprising a polyarylketone resin and a polyetherimide resin; and a carbon fiber, wherein the polyetherimide resin in the matrix resin comprises a polyetherimide resin having a structural unit represented by Formula (1), an amount of the polyetherimide resin in the matrix resin (100% by mass) is 3% by mass to 25% by mass, and an amount of the polyarylketone resin in the matrix resin (100% by mass) is 75% by mass or more.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: February 27, 2024
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Takahiro Hayashi, Takeshi Ishikawa, Kouichiro Taniguchi, Kazuya Tanaka, Masayasu Hasuike
  • Publication number: 20230091378
    Abstract: The present invention relates to a transdermal absorption preparation that can maintain a blood concentration sufficient to exert the efficacy of tandospirone, and also shows good storage stability against heat, humidity, and light. According to the present invention, a transdermal absorption preparation containing tandospirone or a pharmaceutically acceptable salt thereof, and levulinic acid, which is superior in the skin permeability of tandospirone or a pharmaceutically acceptable salt thereof in the preparation, and shows good preservation stability against heat and light can be provided.
    Type: Application
    Filed: February 18, 2021
    Publication date: March 23, 2023
    Applicant: Sumitomo Pharma Co., Ltd.
    Inventors: Eri ICHIBAYASHI, Masayasu TANAKA, Yuki IKEDA, Tomohito TAKITA, Kei TAMURA, Tetsuya NAKAMURA, Kaiji FUJIWARA
  • Publication number: 20220062421
    Abstract: The invention enables more efficient CTL induction by applying a transdermal preparation containing a WT1 protein-derived cancer antigen peptide and an ether-type additive, which is liquid at 20° C., to a WT1 protein-derived cancer antigen peptide. The ether-type additive is represented by the formula (1): R1—O—R2 (1), wherein R1 is a hydrocarbon group having 8-24 carbon atoms, and R2 is a group represented by the formula (2): or a group represented by the formula (3): —(CH2CH2O)mH (3), wherein m is an integer of 1-18.
    Type: Application
    Filed: November 17, 2021
    Publication date: March 3, 2022
    Applicant: SUMITOMO DAINIPPON PHARMA CO., LTD.
    Inventors: Masayasu TANAKA, Kazumitsu YAMAMOTO, Hiroo MAEDA, Koichi SAITO, Natsuko SUGINOBE
  • Publication number: 20210322385
    Abstract: The present invention pertains to a drug for the treatment and/or prevention of pain, more specifically to a medicinal preparation for external use to treat and/or prevent peripheral neuropathic pain, the medicinal preparation containing as an active ingredient N2-{[1-ethyl-6-(4-methylphenoxy)-1H-benzimidazol-2-yl]methyl}-L-alaninamide.
    Type: Application
    Filed: July 18, 2019
    Publication date: October 21, 2021
    Applicant: Sumitomo Dainippon Pharma Co., Ltd.
    Inventors: Masayasu TANAKA, Yoshihiro OYAMADA, Yoshinori TAKADA
  • Patent number: 9406773
    Abstract: A semiconductor device which provides compactness and enhanced drain withstand voltage. The semiconductor device includes: a gate electrode; a source electrode spaced from the gate electrode; a drain electrode located opposite to the source electrode with respect to the gate electrode in a plan view and spaced from the gate electrode; at least one field plate electrode located between the gate and drain electrodes in a plan view, provided over the semiconductor substrate through an insulating film and spaced from the gate electrode, source electrode and drain electrode; and at least one field plate contact provided in the insulating film, coupling the field plate electrode to the semiconductor substrate. The field plate electrode extends from the field plate contact at least either toward the source electrode or toward the drain electrode in a plan view.
    Type: Grant
    Filed: October 18, 2014
    Date of Patent: August 2, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Masayasu Tanaka
  • Publication number: 20160086939
    Abstract: A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 24, 2016
    Inventors: Hiroshi Takeda, Kiyoshi Takeuchi, Takashi Onizawa, Masayasu Tanaka
  • Patent number: 9263532
    Abstract: A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm?2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: February 16, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Nobuyuki Ikarashi, Masayasu Tanaka
  • Patent number: 9178059
    Abstract: A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: November 3, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Takeda, Kiyoshi Takeuchi, Takashi Onizawa, Masayasu Tanaka
  • Publication number: 20150179746
    Abstract: A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm?2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.
    Type: Application
    Filed: February 24, 2015
    Publication date: June 25, 2015
    Inventors: Nobuyuki Ikarashi, Masayasu Tanaka
  • Publication number: 20150150975
    Abstract: The invention enables more efficient CTL induction by applying a transdermal preparation containing a WT1 protein-derived cancer antigen peptide and an ether-type additive, which is liquid at 20° C., to a WT1 protein-derived cancer antigen peptide. The ether-type additive is represented by the formula (1): R1—O—R2 (1), wherein R1 is a hydrocarbon group having 8-24 carbon atoms, and R2 is a group represented by the formula (2): or a group represented by the formula (3): —(CH2CH2O)mH (3), wherein m is an integer of 1-18.
    Type: Application
    Filed: July 2, 2013
    Publication date: June 4, 2015
    Inventors: Masayasu Tanaka, Kazumitsu Yamamoto, Hiroo Maeda, Koichi Saito, Natsuko Suginobe
  • Patent number: 8975728
    Abstract: A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm?2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 10, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Nobuyuki Ikarashi, Masayasu Tanaka
  • Publication number: 20150056765
    Abstract: A semiconductor device which provides compactness and enhanced drain withstand voltage. The semiconductor device includes: a gate electrode; a source electrode spaced from the gate electrode; a drain electrode located opposite to the source electrode with respect to the gate electrode in a plan view and spaced from the gate electrode; at least one field plate electrode located between the gate and drain electrodes in a plan view, provided over the semiconductor substrate through an insulating film and spaced from the gate electrode, source electrode and drain electrode; and at least one field plate contact provided in the insulating film, coupling the field plate electrode to the semiconductor substrate. The field plate electrode extends from the field plate contact at least either toward the source electrode or toward the drain electrode in a plan view.
    Type: Application
    Filed: October 18, 2014
    Publication date: February 26, 2015
    Inventor: Masayasu Tanaka
  • Patent number: 8884380
    Abstract: A semiconductor device which provides compactness and enhanced drain withstand voltage. The semiconductor device includes: a gate electrode; a source electrode spaced from the gate electrode; a drain electrode located opposite to the source electrode with respect to the gate electrode in a plan view and spaced from the gate electrode; at least one field plate electrode located between the gate and drain electrodes in a plan view, provided over the semiconductor substrate through an insulating film and spaced from the gate electrode, source electrode and drain electrode; and at least one field plate contact provided in the insulating film, coupling the field plate electrode to the semiconductor substrate. The field plate electrode extends from the field plate contact at least either toward the source electrode or toward the drain electrode in a plan view.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: November 11, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Masayasu Tanaka
  • Patent number: 8766276
    Abstract: A nitride semiconductor layer formed from a nitride semiconductor is provided on at least one surface side of a semiconductor substrate. Impurity regions (a source region, a drain region, and the like) are provided on one surface side in the nitride semiconductor layer and contain an impurity of a first conductivity type. In addition, amorphous regions (a first amorphous region and a second amorphous region) are a part of the impurity regions and are located in a surface layer of the impurity regions. In addition, metallic layers (a source electrode and a drain electrode) come into contact with the amorphous regions (the first amorphous region and the second amorphous region).
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: July 1, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Masayasu Tanaka
  • Publication number: 20140084386
    Abstract: A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.
    Type: Application
    Filed: September 26, 2013
    Publication date: March 27, 2014
    Applicant: Renesas Electronics Corporation
    Inventors: Hiroshi Takeda, Kiyoshi Takeuchi, Takashi Onizawa, Masayasu Tanaka
  • Publication number: 20140023695
    Abstract: A patch preparation containing a support and an adhesive layer formed on one surface of the support, wherein the adhesive layer contains 2-(4-ethyl-1-piperazinyl)-4-(4-fluorophenyl)-5,6,7,8,9,10-hexahydrocycloocta[b]pyridine or a physiologically acceptable acid addition salt thereof, an acrylic polymer, lactic acid, sesame oil and one or more kinds of stabilizers selected from 2-mercaptobenzimidazole, 2,6-di-tert-butyl-4-methylphenol and propyl gallate. A patch preparation containing a support and an adhesive layer containing lactic acid and magnesium aluminometasilicate and formed on at least one surface of the support, which preparation is superior in both skin permeability and adhesiveness in the presence of water.
    Type: Application
    Filed: February 1, 2012
    Publication date: January 23, 2014
    Inventors: Yasuaki Okada, Katsuhiro OKada, Masato Nishimura, Yuji Kawaharada, Hiroo Maeda, Kazumitsu Yamamoto, Masayasu Tanaka
  • Publication number: 20130315977
    Abstract: The present invention relates to an external preparation for transdermal administration, which remarkably enhances the skin permeability of 2-(4-ethyl-1-piperazinyl)-4-(4-fluorophenyl)-5,6,7,8,9,10-hexahydrocycloocta[b]pyridine (compound A). The adhesive preparation of the present invention has an adhesive layer formed on one surface of a support, and the adhesive layer contains (i) compound A or a physiologically acceptable acid addition salt thereof, (ii) an adhesive, (iii) lactic acid, and (iv) an additive containing a particular permeation enhancer, whereby remarkably superior skin permeability is provided.
    Type: Application
    Filed: February 1, 2012
    Publication date: November 28, 2013
    Inventors: Hiroo Maeda, Kazumitsu Yamamoto, Masayasu Tanaka
  • Patent number: 8582336
    Abstract: According to one embodiment, a power supply circuit includes an input terminal, a rectifier circuit, a power factor improvement circuit, a DC/DC converter, and a control module. The DC/DC converter converts the level of a DC voltage output from the power factor improvement circuit. The control module determines on the basis of the output voltage of the rectifier circuit whether an input power supply supplied to the input terminal is AC or DC. The control module generates a DC power supply by use of the power factor improvement circuit and DC/DC converter when the input power supply is AC and generates a DC power supply by controlling the operation of the power factor improvement circuit and DC/DC converter according to the voltage of input DC power supply when the input power supply is DC.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: November 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masayasu Tanaka
  • Publication number: 20130092949
    Abstract: A second epitaxial layer is grown epitaxially over a first epitaxial layer. The first epitaxial layer includes an epitaxially grown layer and a defect layer. The defect layer is disposed over the epitaxially grown layer and serves as a surface layer of the first epitaxial layer. The defect density of the defect layer is 5×1017 cm?2 or more. Defects penetrating through the defect layer form loops in the second epitaxial layer.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 18, 2013
    Inventors: Nobuyuki Ikarashi, Masayasu Tanaka