Patents by Inventor Masayoshi Kobayashi

Masayoshi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8064340
    Abstract: An apparatus includes a collection device, a determining device, and an estimating device. The collection device collects information and flow rates of flows circulated in a network and structural information of the network. The determining device finds links through which the flows pass from the information and the network structural information, and determines the flows based on degrading and non-degrading threshold values. The estimating device, from a set of the links through which the quality-degraded flows pass, outputs a subset having a minimum element number and including a link through which an arbitrary flow among the quality-degraded flows passes. The determining device changes, for a set of the quality-degraded flows that pass a link through which a given quality-non-degraded flow passes, the non-degraded flow number threshold value depending on number of elements of a set. When this threshold value becomes high, the estimating device finds a non-degraded link.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: November 22, 2011
    Assignee: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20110261185
    Abstract: A method and a system for stabilizing the sight line of a chip component being carried on two discs, for stabilizing delivery of the chip component between the two discs, and improving and stabilizing the inspection accuracy in the visual check of the chip component. This is achieved by employing a mechanism for carrying the chip component while supporting it on the horizontal plane of the first rotary disc and then carrying the chip component while suction-holding it on the vertical plane of the second rotary disc. When the chip component is carried on the first rotary disc, the upper surface and one side face of the chip component are imaged by first and second cameras. When the chip component is carried on the second rotary disc, the lower surface and the other side face of the chip component are imaged by third and fourth cameras.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 27, 2011
    Applicant: TDK Corporation
    Inventors: Masayoshi Kobayashi, Toru Mizuno
  • Patent number: 8036121
    Abstract: In a quality degradation (QD) portion estimating method on a network, a passive measuring unit connected with a management target network measures E2E flow quality (FQ) data on a route from a transmitting terminal connected with a different network to a receiving terminal connected with the management target network and upstream FQ data on the route from the transmitting terminal to the passive measuring unit in the management target network. A QD portion estimating section connected with the management target network collects E2E FQ data and upper stream FQ data measured by said passive measuring unit. A detecting section detects as a QD flow in the management target network, a flow related to the E2E FQ data that does not show degradation of FQ, for the upstream FQ data related to the same transmitting and receiving terminals, from among the E2E FQ data which show the degradation of FQ.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: October 11, 2011
    Assignee: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20110215398
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: May 13, 2011
    Publication date: September 8, 2011
    Applicants: RENESAS ELECTRONICS CORPORATION, HITACHI ULSI SYSTEMS CO., LTD.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Patent number: 7987968
    Abstract: A method and a system for stabilizing the sight line of a chip component being carried on two discs, for stabilizing delivery of the chip component between the two discs, and improving and stabilizing the inspection accuracy in the visual check of the chip component. This is achieved by employing a mechanism for carrying the chip component while supporting it on the horizontal plane of the first rotary disc and then carrying the chip component while suction-holding it on the vertical plane of the second rotary disc. When the chip component is carried on the first rotary disc, the upper surface and one side face of the chip component are imaged by first and second cameras. When the chip component is carried on the second rotary disc, the lower surface and the other side face of the chip component are imaged by third and fourth cameras.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: August 2, 2011
    Assignee: TDK Corporation
    Inventors: Masayoshi Kobayashi, Toru Mizuno
  • Publication number: 20100269506
    Abstract: The present invention provides a fuel spray apparatus for a gas turbine engine, including: a pilot part configured to spray a fuel to be used for a diffusion combustion; a main part provided so as to surround the pilot part and configured to inject a pre-mixed gas only upon a high power operation; and a shield body constituting a purge air passage which is configured to take therein an air flowed on an upstream side relative to a fuel injection port of the main part as a purge air, and to blow off a fuel dripping from the fuel injection port toward a main air passage of the main part. The purge air passage is provided in a position opposite to a main fuel passage communicated with the fuel injection port across the shield body.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 28, 2010
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Yoshiharu Nonaka, Masayoshi Kobayashi, Hideki Ogata
  • Publication number: 20100177646
    Abstract: In a quality degradation (QD) portion estimating method on a network, a passive measuring unit connected with a management target network measures E2E flow quality (FQ) data on a route from a transmitting terminal connected with a different network to a receiving terminal connected with the management target network and upstream FQ data on the route from the transmitting terminal to said passive measuring unit in the management target network. A QD portion estimating section connected with the management target network collects E2E FQ data and upper stream FQ data measured by said passive measuring unit. A detecting section detects as a QD flow in the management target network, a flow related to the E2E FQ data that does not show degradation of FQ, for the upstream FQ data related to the same transmitting and receiving terminals, from among the E2E FQ data which show the degradation of FQ.
    Type: Application
    Filed: August 8, 2007
    Publication date: July 15, 2010
    Inventor: Masayoshi Kobayashi
  • Publication number: 20100173461
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: March 15, 2010
    Publication date: July 8, 2010
    Applicants: RENESAS TECHNOLOGY CORP., HITACHI ULSI SYSTEMS CO., LTD.
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20100157818
    Abstract: A network system estimating a point of quality degradation with high accuracy at high speed based on flow quality information and routing information on a large-scale network is provided. A network system causing a communication characteristic collection unit S11 and route information collection unit S12 to collect flow quality information and routing information on a network, respectively, and including a non-degradation link removal processing unit S15 extracting flows each passing through a route of quality degradation based on quality information and routing information on flows each passing through one of sub-networks N1 to N3 constituting a network 100 collected for each of the sub-networks N1 to N3, and a point-of-quality-degradation estimation unit SA14 estimating routes of quality degradation on the network 100 by merging the quality information on the extracted flows on the respective sub-networks N1 to N3 with one another on the entire network 100.
    Type: Application
    Filed: August 30, 2006
    Publication date: June 24, 2010
    Applicant: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20100118718
    Abstract: A QoS degradation point estimation device (S1) includes a flow set decision unit (3), a flow quality information collection unit (1), a path information collection unit (2), a flow link table management unit (4), and a QoS degradation point estimation unit (8). Before generating a flow link table which associates QoS of a flow going through a network with a link the flow passes through, the flow set decision unit (3) preferentially selects a flow which passes through almost ½ of the total number of links of the network as a flow to be registered in the flow link table. The flow quality information collection unit (1) collects information of the QoS of the flow. The path information collection unit (2) collects path information of the network. The flow link table management unit (4) generates the flow link table based on the information of the QoS and the path information. The QoS degradation point estimation unit (8) estimates a QoS degradation link based on the flow link table.
    Type: Application
    Filed: February 26, 2008
    Publication date: May 13, 2010
    Inventor: Masayoshi Kobayashi
  • Publication number: 20100049460
    Abstract: A quality degradation point estimating method for estimating a quality degradation point in a directed link set through which a communication flow passed is provided. The quality degradation point estimating method has: (A) determining a test flow set for estimating a quality degradation point; and (B) estimating the quality degradation point in the directed link set by sending the test flow set to the network. The (A) step includes a step of setting the flow, which passes through a partial set as a part of the directed link set, as the test flow and adding the set test flow to the test flow set. The test flow is sent from the test terminal on the network to a predetermined node in the partial set. A response is obtained at the predetermined node, and the response is sent from the predetermined node to a predetermined terminal.
    Type: Application
    Filed: June 20, 2006
    Publication date: February 25, 2010
    Inventors: Yohei Hasegawa, Masayoshi Kobayashi
  • Patent number: 7606896
    Abstract: An estimating device includes a collecting unit for collecting flow quality information including a transmitter and receiver address, and flow communication quality; a collecting unit for collecting structure information; a table managing unit and a table storage unit for finding, based on the collected flow quality information of the network, a link that the flow goes through, judging occurrence of quality deterioration in the flow, and managing a result thereof in a table; and a estimating unit for outputting, when there is quality deterioration in one or more flow, a subset including the link that an arbitrary flow with quality deterioration goes through among the subset of the set of links that the set of the arbitrary flows with the quality deterioration go through, which also has the minimum number of elements, as a quality deteriorated area in the table managed by the flow-quality/via-link table managing unit.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: October 20, 2009
    Assignee: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Patent number: 7519048
    Abstract: A switching apparatus for relaying packet communication through a communication network between a plurality of servers and clients, at the time of relaying a packet to be transmitted from the server to the client, rewrites header information of the packet in question to have the contents to be set when the packet in question is transmitted from the switching apparatus and sends the rewritten packet to the client and from the time of relaying a data acquisition request from the client until the end of transmission of a packet of an acknowledgement to be transmitted from the server to the client, conducts one-way splicing in the direction from the server in question to the client in question, as well as successively conducting retransmission control and flow control with respect to communication from the client to the server.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: April 14, 2009
    Assignee: NEC Corporation
    Inventor: Masayoshi Kobayashi
  • Publication number: 20090052331
    Abstract: Estimation is carried out with high accuracy based on flow quality information in a situation where, although a set of links that may have a flow passing through is known, which of such links the flow passed through cannot be identified, such as multi-paths routing, load distribution routing, and the like.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 26, 2009
    Applicant: NEC CORPORATION
    Inventors: Masayoshi KOBAYASHI, Tsutomu KITAMURA
  • Publication number: 20090052343
    Abstract: [OBJECT] To provide a quality-degraded portion estimating apparatus capable of accurately and rapidly estimating a portion of a communication network system where communication quality is degraded according to flow quality information.
    Type: Application
    Filed: January 31, 2007
    Publication date: February 26, 2009
    Applicant: NEC CORPORATION
    Inventor: Masayoshi Kobayashi
  • Publication number: 20080173019
    Abstract: A gas turbine combustor burns a fuel mixture at a high combustion efficiency and a low NOx emission, is simple in construction and exercises improved ignition performance, and an ignition method can efficiently igniting a fuel mixture in the gas turbine combustor. A gas turbine combustor provided with fuel nozzles each having a pilot fuel injection nozzle and a main fuel injection nozzle, and fuel nozzles each having a pilot fuel injection nozzle and a main fuel injection nozzle. The fuel nozzle disposed close to an igniter is provided with a local fuel injection port through which fuel is jetted out from a predetermined position in an air passage in the main fuel injection nozzle to create a combustible fuel mixture zone in the vicinity of the igniter at least while the igniter is in an ignition operation.
    Type: Application
    Filed: March 15, 2006
    Publication date: July 24, 2008
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Masayoshi Kobayashi, Hiroyuki Ninomiya, Takeo Oda
  • Publication number: 20070290239
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: July 27, 2007
    Publication date: December 20, 2007
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20070290268
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: August 9, 2007
    Publication date: December 20, 2007
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20070278567
    Abstract: In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
    Type: Application
    Filed: August 3, 2007
    Publication date: December 6, 2007
    Inventors: Sumito Numazawa, Yoshito Nakazawa, Masayoshi Kobayashi, Satoshi Kudo, Yasuo Imai, Sakae Kubo, Takashi Shigematsu, Akihiro Ohnishi, Kozo Uesawa, Kentaro Oishi
  • Publication number: 20070205084
    Abstract: A method and a system for stabilizing the sight line of a chip component being carried on two discs, for stabilizing delivery of the chip component between the two discs, and improving and stabilizing the inspection accuracy in the visual check of the chip component. This is achieved by employing a mechanism for carrying the chip component while supporting it on the horizontal plane of the first rotary disc and then carrying the chip component while suction-holding it on the vertical plane of the second rotary disc. When the chip component is carried on the first rotary disc, the upper surface and one side face of the chip component are imaged by first and second cameras. When the chip component is carried on the second rotary disc, the lower surface and the other side face of the chip component are imaged by third and fourth cameras.
    Type: Application
    Filed: September 7, 2004
    Publication date: September 6, 2007
    Applicant: TDK Corporation
    Inventors: Masayoshi Kobayashi, Toru Mizuno