Patents by Inventor Masayoshi Naito

Masayoshi Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7708517
    Abstract: A workpiece transfer system or method is provided for transferring workpieces one set of pallets to another set of pallets using a workpiece transfer device that is movably attached to a robot. The workpiece transfer device uses mechanical devices to align the workpiece relative to the robot so that different types of workpieces can be placed into a pallet without the need of troublesome, expensive and complex image processing in which the workpiece holding positions are processed as images by using an imaging device such as a visual sensor. Preferably, the workpiece transfer device cooperates with a positional adjustment part such that the workpiece that is held by the transfer device contacts the the positional adjustment part to position the workpiece in a depthwise direction of the workpiece, a widthwise direction of the workpiece and a longitudinal direction of the workpiece.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: May 4, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Setsuo Nakamura, Shouji Nishimaki, Kenji Masumo, Yoshiharu Honda, Masayoshi Naito, Yuta Motohashi
  • Publication number: 20070116550
    Abstract: A workpiece transfer system or method is provided for transferring workpieces one set of pallets to another set of pallets using a workpiece transfer device that is movably attached to a robot. The workpiece transfer device uses mechanical devices to align the workpiece relative to the robot so that different types of workpieces can be placed into a pallet without the need of troublesome, expensive and complex image processing in which the workpiece holding positions are processed as images by using an imaging device such as a visual sensor. Preferably, the workpiece transfer device cooperates with a positional adjustment part such that the workpiece that is held by the transfer device contacts the the positional adjustment part to position the workpiece in a depthwise direction of the workpiece, a widthwise direction of the workpiece and a longitudinal direction of the workpiece.
    Type: Application
    Filed: November 20, 2006
    Publication date: May 24, 2007
    Applicant: Nissan Motor Co., Ltd.
    Inventors: Setsuo Nakamura, Shouji Nishimaki, Kenji Masumo, Yoshiharu Honda, Masayoshi Naito, Yuta Motohashi
  • Patent number: 5841946
    Abstract: A chaotic character evaluating apparatus includes a processor for predicting future variation in sequential data and a processing for determining a degree of accuracy of the prediction, a processor for predicting variation of the sequential data in reverse and a processor for determining a degree of accuracy of the prediction, and a processing for comparing the degrees of accuracy with each other. If the degrees of the accuracy differ from each other, the variation of the sequential data is determined to be attributable to chaos, while when the degrees of accuracy are substantially equal to each other, the variation in the sequential data is determined to be attributable to noise. Further, a control apparatus for generating a control value from a feedback signal output from an object under control and having chaotic components eliminated is realized. Thus, it is possible to easily and accurately determine whether variation in the sequential data is attributable to chaos or noise.
    Type: Grant
    Filed: November 25, 1994
    Date of Patent: November 24, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Naito, Naoki Tanaka, Hiroshi Okamoto, Masahiro Kayama, Yasuo Morooka
  • Patent number: 5510976
    Abstract: A control system is for accelerating stabilization of a chaotic state of a controlled system into a desired periodic state. In the control system, the SOGY algorithm is extended to permit selection of a region on a chaotic attractor as a target, so that the SOGY algorithm can be successfully combined with the OGY algorithm for the purpose of stabilization of the controlled system in the periodic state. Also, the method of nonlinear prediction is introduced so as to secure the effectiveness of the SOGY algorithm. Further, an uncertainty of prediction is taken into consideration so as to eliminate unnecessary control and to improve the effectiveness of the SOGY algorithm.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: April 23, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Tanaka, Hiroshi Okamoto, Masayoshi Naito, Shin-ichiro Umemura, Yasuo Morooka, Masahiro Kayama, Hiroaki Okudaira
  • Patent number: 5420663
    Abstract: An exposure apparatus for exposing a peripheral portion of a substrate to light comprises a rotating member for rotating a substrate to which a resist is applied, an irradiating system for irradiating the substrate with light which is sensed by the resist, a position detecting system for detecting a relative position between the light and the substrate in a radial direction of the substrate, a moving system for making a relative movement between the light and the substrate in the radial direction of the substrate, a periphery detecting member for detecting outer-periphery information corresponding to a shape of an outer periphery of the substrate, a control system for servo-controlling the moving system in accordance with the outer periphery of the substrate to make the width of the light emitted on the substrate constant, a characteristic detecting member for detecting a specific part of the peripheral portion of the substrate, and a control characteristic changing member for changing a control quantity of t
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: May 30, 1995
    Assignee: Nikon Corporation
    Inventors: Masao Nakajima, Masayoshi Naito
  • Patent number: 5361121
    Abstract: Prior to a periphery exposing operation, a light emitting unit and a light receiving unit are retracted to a position separate from a wafer, and a calibrating operation is conducted in the retracted position utilizing a light shield plate different from the wafer to be exposed, thereby obtaining a servo control reference signal for the exposure. At the exposure of the periphery portion of the wafer, the exposure width is controlled according to the reference signal. It is therefore rendered possible to achieve exact peripheral exposure, including the intensity and intensity distribution of the exposing light beam immediately before the irradiation of the peripheral portion of the wafer.
    Type: Grant
    Filed: May 2, 1991
    Date of Patent: November 1, 1994
    Assignee: Nikon Corporation
    Inventors: Ken Hattori, Kesayoshi Amano, Masao Nakajima, Masayoshi Naito
  • Patent number: 5229811
    Abstract: An exposing apparatus for exposing the periphery portion of a substrate on which resist is uniformly applied while rotating the substrate by a rotating device around a substantially central portion of the substrate, comprising: an irradiating device capable of irradiating a light beam, which is not sensed by the resist, toward the periphery portion of the resist; a light receiving device disposed to confront the irradiating device, receiving the light beam and outputting a light receipt signal in accordance with the quantity of received light; a detection device for detecting the rotational angle of the resist and outputting an angular signal; a moving device for relatively moving the light beam irradiated and the substrate in a radial direction; and a control device, wherein the substrate is disposed between the irradiating device and the light receiving device so as to shield a portion of the light beam and a control device controls the moving device in accordance with the light receipt signal and the angul
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: July 20, 1993
    Assignee: Nikon Corporation
    Inventors: Ken Hattori, Kesayoshi Amano, Masao Nakajima, Masayoshi Naito
  • Patent number: 5107307
    Abstract: A semiconductor optical modulator is provided wherein very thin films of two kinds of semiconductors having different band gaps are laminated alternately to form a multi-quantum well (MQW) structure, also called a super-lattice structure, and current is injected into the MQW structure to change the corresponding optical absorption and refractive index characteristic thereof so that a sufficient on/off ratio can be obtained.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: April 21, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Hidekatsu Onose, Michio Ohue, Masayoshi Naito
  • Patent number: 4867136
    Abstract: An endoscope apparatus for inspecting an object including an insertion section insertable into the object and having a distal end and a proximal end, an image guide arranged within the insertion section and having entrance and exit ends arranged at the distal and proximal ends of insertion section, respectively, an objective lens system arranged at the distal end of insertion section for forming an optical image of the object onto the entrance end of image guide, an eyepiece lens system arranged at the proximal end of insertion section for projecting the optical image transmitted through the image guide onto an observating position, a first piezo-electric bimorph arranged at the distal end of insertion section for vibrating the entrance end of image guide in a direction perpendicular to a longitudinal axis of the insertion section over a given distance, a second piezo-electric element arranged at the proximal end of insertion section for vibrating the exit end of image guide in the same direction and over the
    Type: Grant
    Filed: April 19, 1988
    Date of Patent: September 19, 1989
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Akira Suzuki, Susumu Takahashi, Takeaki Nakamura, Tatsuya Yamaguchi, Takashi Tsukaya, Tsutomu Yamamoto, Masanao Murata, Kazunari Kobayashi, Yoshikazu Tojo, Kenichi Kikuchi, Koji Kanbara, Yoshihito Shimizu, Akira Hasegawa, Shinichiro Hattori, Iwao Kanamori, Akira Yokota, Kimihiko Nishioka, Minoru Okabe, Katsuyuki Kanehira, Nobuo Yamashita, Masayoshi Naito, Tomoaki Sato, Koichi Matsui, Kenji Hirooka, Hiroki Hibino
  • Patent number: 4682199
    Abstract: In a high-voltage thyristor comprising a semiconductor body having contiguous pnpn four layers, and opposed anode and cathode electrodes and a gate electrode provided for the semiconductor body, one of p-base and n-base regions having an impurity concentration higher than the other has an impurity concentration which is no more than 8.times.10.sup.15 atoms/cm.sup.3 in the vicinity of a junction between the one base region and an adjacent emitter region and which has a gradually decreasing gradient toward the other contiguous base region. The one base region has a sheet resistance of 500 to 1500 ohms/.quadrature.. The realization of a high-voltage, large-diameter and large-current thyristor can be ensured.
    Type: Grant
    Filed: April 28, 1983
    Date of Patent: July 21, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Yatsuo, Naohiro Momma, Masayoshi Naito, Masahiro Okamura
  • Patent number: 4604535
    Abstract: A switching device and circuit comprises a bipolar transistor and at least two field effect transistors for controlling the bipolar transistor. A first field effect transistor has its drain and source connected across the collector-base of the bipolar transistor and a second field effect transistor has its drain and source connected across the base-emitter of the bipolar transistor. Gates of the first and second field effect transistors are connected in common and supplied with a voltage signal. The first field effect transistor is of an enhancement type and the second field effect transistor is of a depletion type.
    Type: Grant
    Filed: May 10, 1982
    Date of Patent: August 5, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Takao Sasayama, Kazuo Kato, Masayoshi Naito
  • Patent number: 4542398
    Abstract: A multi-emitter type semiconductor device, namely, a semiconductor device having an arrangement in which a majority of emitter regions are divided by a gate region and surrounded thereby. In the semiconductor device, a member adapted to apply an external control signal to a gate electrode takes the form of a closed-loop shape and the majority of emitter regions are arranged on both sides of the loop. This arrangement ensures that the individual emitter regions, even when the number of the emitter regions is increased to a great extent, can be applied with a uniform control signal, thereby preventing degradation of the turn-off characteristics.
    Type: Grant
    Filed: June 18, 1984
    Date of Patent: September 17, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Tsutomu Yatsuo, Masayoshi Naito, Takahiro Nagano, Tomio Yasuda, Jin Onuki, Mitsuo Yanagi, Fumio Sato
  • Patent number: 4404580
    Abstract: A light activated thyristor with high dv/dt capability is provided by disposing first and second thyristors, one a primary and the other a pilot thyristor, in a semiconductor body having first and second major surface. The two thyristors have common first emitter, first base, and second base regions, and have spaced apart second emitter regions adjoining the second major surface of the body. The second emitter region of the second thyristor consists of first and second portions, first portion abutting the second base region of the second thyristor to create a ratarded electrical field. An exposed portion of the second major surface at the second emitter region of the second thyristor activates the second thyristor when electromagnetic radiation of wavelengths corresponding substantially to the energy bandgap of the semiconductor body strikes this exposed portion.
    Type: Grant
    Filed: July 24, 1980
    Date of Patent: September 13, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Nobutake Konishi, Masayoshi Naito, Tsutomu Yatsuo, Yoshio Terasawa
  • Patent number: 4388635
    Abstract: A novel structure of a high breakdown voltage semiconductor device has a pair of major surfaces on which a pair of main electrodes are formed and a PN junction formed between the pair of major surfaces with a side surface to which the PN junction is exposed being covered with a passivation material. An auxiliary electrode of a conductive member is provided, which is disposed externally of the peripheral edge of the major surface of the semiconductor substrate, and which contacts to the passivation material and is electrically connected to the main electrode. When a voltage for reverse biasing the PN junction is applied between the pair of main electrodes, ions in the passivation material are collected by an electric field established in the passivation material so that the deterioration of the breakdown on the surface of the semiconductor substrate is prevented.
    Type: Grant
    Filed: July 1, 1980
    Date of Patent: June 14, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Atsuo Watanabe, Masayoshi Naito, Tsutomu Yatsuo, Masahiro Okamura
  • Patent number: 4235245
    Abstract: A device for picking up tissues comprises a flexible outer sheath, an extension wire extending through the outer sheath, a connector fixed by one end of the wire and having an outer diameter larger than the inner diameter of the outer sheath for abutting on one end of the outer sheath, a tissue picking-up section connected to said one end of the wire by the connector, a wire holding section for holding the other end of the extension wire and receiving the other end of the outer sheath, a chamber formed in the wire holding section, and a compression spring disposed in the wire holding section for resiliently urging the other end of the outer sheath toward the tissue picking-up section. The device is inserted into an endoscope disposed in a body cavity, and its outer sheath can be easily bent according to the shape of the body cavity.
    Type: Grant
    Filed: November 8, 1978
    Date of Patent: November 25, 1980
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Masayoshi Naito
  • Patent number: 4223328
    Abstract: A field controlled thyristor is disclosed which comprises a first emitter region exposed to one main surface of a semiconductor substrate and having a first conductivity type, a second emitter region exposed to the other main surface of the substrate and having a second conductivity type, a base region connecting the first and the second emitter region, and a gate region provided in the base region. The gate region consists of a slab-like first portion disposed parallel to both the emitter and a second portion connecting the first slab-like portion with one of the main surfaces of the semiconductor substrate. The impurity concentration of the base region is higher in the portion of the base region nearer to the emitter region having the same conductivity type as that of the base region than in the portion of the base region nearer to the emitter region having the opposite conductivity type to that of the base region.
    Type: Grant
    Filed: June 1, 1978
    Date of Patent: September 16, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Yoshio Terasawa, Kenji Miyata, Masayoshi Naito, Takuzo Ogawa, Masahiro Okamura
  • Patent number: 4219832
    Abstract: A thyristor comprising a four-layer semiconductor substrate of PNPN structure in which the sum of the thicknesses in the layered direction of the intermediate P-type and N-type layers is less than 400.mu., and the amount of impurities per unit area of either one of the outer P-type and N-type layers is less than 3.times.10.sup.14 atoms/cm.sup.2.
    Type: Grant
    Filed: August 20, 1976
    Date of Patent: August 26, 1980
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Naito, Takahiro Nagano, Takuzo Ogawa
  • Patent number: 4107731
    Abstract: A semiconductor device is doped with a multiple acceptor impurity having a monovalent energy level for forming a recombination center of carriers within the semiconductor body, and at least one multivalent energy level for capturing carriers within a depletion layer of a PN junction of the semiconductor body.
    Type: Grant
    Filed: March 19, 1976
    Date of Patent: August 15, 1978
    Assignee: Hitachi, Ltd.
    Inventors: Masayoshi Naito, Tatsuya Kamei