Patents by Inventor Masayoshi Nomura

Masayoshi Nomura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170110732
    Abstract: To provide a secondary cell including an electrode active material that is a compound represented by General Formula (1) below: where n is a natural number of from 4 through 8, a is a natural number of from 1 through 4, R1 and R2 may be identical to or different from each other and are each a hydrogen atom, an alkyl group, or an aromatic hydrocarbon group that may have a substituent, Y is a substituent, and b is an integer of from 0 through 3 and a+b is 4 or less in General Formula (1).
    Type: Application
    Filed: October 10, 2016
    Publication date: April 20, 2017
    Inventor: Masayoshi NOMURA
  • Publication number: 20160268607
    Abstract: Provided is a secondary battery that includes an electrode active material including an organic compound represented by the following General Formula 1. Ar—(OH)n??<General Formula 1> In the General Formula 1, Ar denotes at least one selected from the group consisting of 1,1-binaphthalene, anthracene, triphenylene, tetraphenylene, and pyrene, and is optionally substituted with a substituent. The substituent of Ar is at least one selected from the group consisting of an OH group, a carbonyl group produced through oxidization of the OH group, an alkyl group containing 3 or less carbon atoms, a halogen atom, and an amino group. n denotes an integer in a range of from 2 through 8.
    Type: Application
    Filed: February 4, 2016
    Publication date: September 15, 2016
    Inventor: Masayoshi NOMURA
  • Publication number: 20160263946
    Abstract: Disclosed herein is a tread for a tire. The tread includes at least one elongate block of rubbery material of width W and length L with L>>W. This elongate block extends in a circumferential direction (X) when the tread is mounted on the tire. The elongate block includes a contact surface intended to come into contact with the ground and a first lateral wall and a second lateral wall delimiting this contact surface. The elongate block includes a plurality of sipes opening onto the contact surface of the elongate block, with each sine extending in an oblique direction opening onto the first lateral wall and onto the second lateral wall. The sipes are distributed over the contact surface of the block in such a way that when one sipe reaches the second lateral wall another sipe starts out from the first lateral wall, at a same circumferential level (N) on the elongate block. With the sipes delimiting sub-blocks in the elongate block, at least two of these sub-blocks are configured differently in the tread.
    Type: Application
    Filed: November 5, 2014
    Publication date: September 15, 2016
    Applicants: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELIN, MICHELIN RECHERCHE ET TECHNIQUE, S.A.
    Inventors: Matthieu BONNAMOUR, Benoit DURAND-GASSELIN, Serge LEFEBVRE, Mathieu VANDAELE, Kazutaka YOKOKAWA, Masayoshi NOMURA
  • Patent number: 9082471
    Abstract: Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change between refresh operations of the memory device. Other embodiments including additional apparatus, systems, and methods are described.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: July 14, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Patent number: 9040215
    Abstract: To provide an amine compound, represented by General Formula (I) below: [In General Formula (I), R1 and R2 represent a substituted or unsubstituted alkyl group, a substituted or unsubstituted aralkyl group, or a substituted or unsubstituted aromatic hydrocarbon group, which may be identical or different; m and n are an integer of 1 or 0; Ar1 represents a substituted or unsubstituted aromatic hydrocarbon group; Ar2 and Ar3 represent a substituted or unsubstituted alkyl group, a substituted or unsubstituted aralkyl group, or a substituted or unsubstituted aromatic hydrocarbon group; and Ar1 and Ar2 or Ar2 and Ar3 may bind to each other to form a substituted or unsubstituted heterocyclic group including a nitrogen atom.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: May 26, 2015
    Assignee: Ricoh Company, Ltd.
    Inventors: Tomoyuki Shimada, Masayoshi Nomura, Ryota Arai
  • Patent number: 9042195
    Abstract: A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface logic. During operation of a drowsy mode in the memory device, a self-refresh signal causes the control signal to disable the external inputs. With the external inputs disabled, command hazards are reduced when exiting drowsy mode.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: May 26, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Publication number: 20140247680
    Abstract: Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change between refresh operations of the memory device. Other embodiments including additional apparatus, systems, and methods are described.
    Type: Application
    Filed: May 14, 2014
    Publication date: September 4, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Publication number: 20140234763
    Abstract: An image forming apparatus includes an image bearing member having a photosensitive layer and a sub-surface layer having a charge transportability, overlying the photosensitive layer wherein the sub-surface layer is formed of a cured material formed of a radical polymerizable monomer having three or more functional groups with no charge transport structure and a radical polymerizable compound having a charge transport structure, wherein the arithmetical mean roughness WRa of about each of frequency components of HMH, HML, and HLH obtained by wavelet conversion of values measured by a surface texture and the contour form measuring device ranges from 0.0002 ?m to 0.005 ?m and WRa (LLH) is 0.05 ?m or less, wherein the sub-surface layer contains at least one of a particular oxazole compound or a particular diamine compound.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 21, 2014
    Inventors: Akihiro SUGINO, Keisuke Shimoyama, Tomoharu Asano, Hidetoshi Kami, Nobutaka Eguchi, Kazuhiro Egawa, Tomoyuki Shimada, Ryota Arai, Masayoshi Nomura
  • Patent number: 8736291
    Abstract: Apparatus and methods provide built-in testing enhancements in integrated circuits. These testing enhancements permit, for example, continuity testing to pads and/or leakage current testing for more than one pad. The disclosed techniques may permit more thorough testing of integrated circuits at the die level, thereby reducing the number of defective devices that are further processed, saving both time and money. In one embodiment, a test signal is routed in real time through a built-in path that includes an input buffer for a pad under test. This permits testing of continuity between the pad and the input buffer. An output buffer can also be tested as applicable. In another embodiment, two or more pads of a die are electronically coupled together such that leakage current testing applied by a probe connected to one pad can be used to test another pad.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: May 27, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Yoshinori Fujiwara, Masayoshi Nomura
  • Patent number: 8737155
    Abstract: Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change during a time interval after a refresh operation of the memory device. Other embodiments including additional apparatus, systems, and methods are disclosed.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: May 27, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Publication number: 20140078849
    Abstract: A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface logic. During operation of a drowsy mode in the memory device, a self-refresh signal causes the control signal to disable the external inputs. With the external inputs disabled, command hazards are reduced when exiting drowsy mode.
    Type: Application
    Filed: November 25, 2013
    Publication date: March 20, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Patent number: 8611168
    Abstract: A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface logic. During operation of a drowsy mode in the memory device, a self-refresh signal causes the control signal to disable the external inputs. With the external inputs disabled, command hazards are reduced when exiting drowsy mode.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: December 17, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Publication number: 20130202994
    Abstract: To provide an amine compound, represented by General Formula (I) below: [In General Formula (I), R1 and R2 represent a substituted or unsubstituted alkyl group, a substituted or unsubstituted aralkyl group, or a substituted or unsubstituted aromatic hydrocarbon group, which may be identical or different; m and n are an integer of 1 or 0; Ar1 represents a substituted or unsubstituted aromatic hydrocarbon group; Ar2 and Ar3 represent a substituted or unsubstituted alkyl group, a substituted or unsubstituted aralkyl group, or a substituted or unsubstituted aromatic hydrocarbon group; and Ar1 and Ar2 or Ar2 and Ar3 may bind to each other to form a substituted or unsubstituted heterocyclic group including a nitrogen atom.
    Type: Application
    Filed: January 29, 2013
    Publication date: August 8, 2013
    Inventors: Tomoyuki SHIMADA, Masayoshi NOMURA, Ryota ARAI
  • Patent number: 8325552
    Abstract: A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface logic. During operation of a drowsy mode in the memory device, a self-refresh signal causes the control signal to disable the external inputs. With the external inputs disabled, command hazards are reduced when exiting drowsy mode.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: December 4, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Yutaka Ito, Masayoshi Nomura, Keiichiro Abe
  • Patent number: 8230274
    Abstract: An integrated circuit containing memory includes IEEE 1149.1 (JTAG) controlled self-repair system that permits permanent repair of the memory after the integrated circuit has been packaged. The JTAG controlled self-repair system allows a user to direct circuitry to blow fuses using an externally supplied voltage to electrically couple or isolate components to permanently repair a memory location with JTAG standard TMS and TCK signals. The system may optionally sequentially repair more than one memory location using a repair sequencer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: July 24, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Yoshinori Fujiwara, Masayoshi Nomura
  • Publication number: 20120120749
    Abstract: An integrated circuit containing memory includes IEEE 1149.1 (JTAG) controlled self-repair system that permits permanent repair of the memory after the integrated circuit has been packaged. The JTAG controlled self-repair system allows a user to direct circuitry to blow fuses using an externally supplied voltage to electrically couple or isolate components to permanently repair a memory location with JTAG standard TMS and TCK signals. The system may optionally sequentially repair more than one memory location using a repair sequencer.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicant: Micron Technology, Inc.
    Inventors: Yoshinori Fujiwara, Masayoshi Nomura
  • Patent number: D735655
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: August 4, 2015
    Assignees: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELIN, MICHELIN RECHERCHE ET TECHNIQUE S.A.
    Inventors: Arnaud Frappart, Masayoshi Nomura
  • Patent number: D735658
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: August 4, 2015
    Assignees: MICHELIN RECHERCHE ET TECHNIQUE S.A., COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELIN
    Inventor: Masayoshi Nomura
  • Patent number: D739339
    Type: Grant
    Filed: January 2, 2015
    Date of Patent: September 22, 2015
    Assignees: CAMPAGNIE GENERALE DES ETABLISSMENTS MICHELIN, MICHELIN RECHERCHE ET TECHNIQUE S.A.
    Inventors: Masayoshi Nomura, Julien Besset, Mathieu Vandaele
  • Patent number: D767473
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: September 27, 2016
    Assignees: COMPAGNIE GENERALE DES ETABLISSEMENTS MICHELIN, MICHELIN RECHERCHE ET TECHNIQUE S.A.
    Inventors: Masayoshi Nomura, Kenji Fukuda